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authorErico Nunes <[email protected]>2019-07-21 15:07:50 +0200
committerErico Nunes <[email protected]>2019-08-04 13:38:18 +0200
commitfd29c4d6c561272ab34a71a308c36a0bb72b4816 (patch)
treed52aa442acc8084e806db4b213d7431c1e045951 /src
parenteb82637c2f9cad0c84d09502b7e65166448c0475 (diff)
lima/ppir: simplify select op lowering and scheduling
The select operation relies on the select condition coming from the result of the the alu scalar mult slot, in the same instruction. The current implementation creates a mov node to be the predecessor of select, and then relies on an exception during scheduling to ensure that both ops are inserted in the same instruction. Now that the ppir scheduler supports pipeline register dependencies, this can be simplified by making the mov explicitly output to the fmul pipeline register, and the scheduler can place it without an exception. Since the select condition can only be placed in the scalar mult slot, differently than a regular mov, define a separate op for it. Signed-off-by: Erico Nunes <[email protected]> Reviewed-by: Vasily Khoruzhick <[email protected]> Reviewed-by: Qiang Yu <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/lima/ir/pp/codegen.c3
-rw-r--r--src/gallium/drivers/lima/ir/pp/lower.c8
-rw-r--r--src/gallium/drivers/lima/ir/pp/node.c8
-rw-r--r--src/gallium/drivers/lima/ir/pp/node_to_instr.c6
-rw-r--r--src/gallium/drivers/lima/ir/pp/ppir.h1
5 files changed, 15 insertions, 11 deletions
diff --git a/src/gallium/drivers/lima/ir/pp/codegen.c b/src/gallium/drivers/lima/ir/pp/codegen.c
index 96f1ffce000..615438cfcce 100644
--- a/src/gallium/drivers/lima/ir/pp/codegen.c
+++ b/src/gallium/drivers/lima/ir/pp/codegen.c
@@ -243,6 +243,9 @@ static void ppir_codegen_encode_scl_mul(ppir_node *node, void *code)
case ppir_op_mov:
f->op = ppir_codegen_float_mul_op_mov;
break;
+ case ppir_op_sel_cond:
+ f->op = ppir_codegen_float_mul_op_mov;
+ break;
case ppir_op_max:
f->op = ppir_codegen_float_mul_op_max;
break;
diff --git a/src/gallium/drivers/lima/ir/pp/lower.c b/src/gallium/drivers/lima/ir/pp/lower.c
index c3be6acfe8f..97837f4c198 100644
--- a/src/gallium/drivers/lima/ir/pp/lower.c
+++ b/src/gallium/drivers/lima/ir/pp/lower.c
@@ -201,7 +201,7 @@ static bool ppir_lower_select(ppir_block *block, ppir_node *node)
{
ppir_alu_node *alu = ppir_node_to_alu(node);
- ppir_node *move = ppir_node_create(block, ppir_op_mov, -1, 0);
+ ppir_node *move = ppir_node_create(block, ppir_op_sel_cond, -1, 0);
if (!move)
return false;
list_addtail(&move->list, &node->list);
@@ -214,10 +214,8 @@ static bool ppir_lower_select(ppir_block *block, ppir_node *node)
move_alu->num_src = 1;
ppir_dest *move_dest = &move_alu->dest;
- move_dest->type = ppir_target_ssa;
- move_dest->ssa.num_components = 1;
- move_dest->ssa.live_in = INT_MAX;
- move_dest->ssa.live_out = 0;
+ move_dest->type = ppir_target_pipeline;
+ move_dest->pipeline = ppir_pipeline_reg_fmul;
move_dest->write_mask = 1;
ppir_node_foreach_pred(node, dep) {
diff --git a/src/gallium/drivers/lima/ir/pp/node.c b/src/gallium/drivers/lima/ir/pp/node.c
index c62e4cc2e57..602d4625138 100644
--- a/src/gallium/drivers/lima/ir/pp/node.c
+++ b/src/gallium/drivers/lima/ir/pp/node.c
@@ -211,6 +211,14 @@ const ppir_op_info ppir_op_infos[] = {
PPIR_INSTR_SLOT_END
},
},
+ [ppir_op_sel_cond] = {
+ /* effectively mov, but must be scheduled only to
+ * PPIR_INSTR_SLOT_ALU_SCL_MUL */
+ .name = "sel_cond",
+ .slots = (int []) {
+ PPIR_INSTR_SLOT_ALU_SCL_MUL, PPIR_INSTR_SLOT_END
+ },
+ },
[ppir_op_select] = {
.name = "select",
.slots = (int []) {
diff --git a/src/gallium/drivers/lima/ir/pp/node_to_instr.c b/src/gallium/drivers/lima/ir/pp/node_to_instr.c
index dbc1c9c32ce..711fe2153b4 100644
--- a/src/gallium/drivers/lima/ir/pp/node_to_instr.c
+++ b/src/gallium/drivers/lima/ir/pp/node_to_instr.c
@@ -174,12 +174,6 @@ static bool ppir_do_one_node_to_instr(ppir_block *block, ppir_node *node, ppir_n
ppir_node *succ = ppir_node_first_succ(node);
if (succ->instr_pos == PPIR_INSTR_SLOT_ALU_VEC_ADD) {
node->instr_pos = PPIR_INSTR_SLOT_ALU_VEC_MUL;
- /* select instr's condition must be inserted to fmul slot */
- if (succ->op == ppir_op_select &&
- ppir_node_first_pred(succ) == node) {
- assert(alu->dest.ssa.num_components == 1);
- node->instr_pos = PPIR_INSTR_SLOT_ALU_SCL_MUL;
- }
ppir_instr_insert_mul_node(succ, node);
}
else if (succ->instr_pos == PPIR_INSTR_SLOT_ALU_SCL_ADD &&
diff --git a/src/gallium/drivers/lima/ir/pp/ppir.h b/src/gallium/drivers/lima/ir/pp/ppir.h
index 63494bab2af..d03b48a828b 100644
--- a/src/gallium/drivers/lima/ir/pp/ppir.h
+++ b/src/gallium/drivers/lima/ir/pp/ppir.h
@@ -53,6 +53,7 @@ typedef enum {
ppir_op_normalize3,
ppir_op_normalize4,
+ ppir_op_sel_cond,
ppir_op_select,
ppir_op_sin,