diff options
| author | Axel Davy <[email protected]> | 2019-02-25 21:02:14 +0100 |
|---|---|---|
| committer | Axel Davy <[email protected]> | 2019-03-09 13:57:49 +0100 |
| commit | f7b9c09c7cd41dc91c5392e467b71216234e342e (patch) | |
| tree | e0522ed281af66ab3359f0828b8eec1f2f3b7ef4 /src | |
| parent | d7b31969767c0911b490022dc6bb67827e664644 (diff) | |
st/nine: Disable depth write when nothing gets updated
I do not see any perf impact on radeonsi, but it
seems iris needs this.
It seems something sensible to do.
Signed-off-by: Axel Davy <[email protected]>
Reviewed-by: Timur Kristóf <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
Tested-by: Andre Heider <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/gallium/state_trackers/nine/nine_pipe.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/gallium/state_trackers/nine/nine_pipe.c b/src/gallium/state_trackers/nine/nine_pipe.c index a84a17f551f..b69ddb67113 100644 --- a/src/gallium/state_trackers/nine/nine_pipe.c +++ b/src/gallium/state_trackers/nine/nine_pipe.c @@ -36,8 +36,11 @@ nine_convert_dsa_state(struct pipe_depth_stencil_alpha_state *dsa_state, if (rs[D3DRS_ZENABLE]) { dsa.depth.enabled = 1; - dsa.depth.writemask = !!rs[D3DRS_ZWRITEENABLE]; dsa.depth.func = d3dcmpfunc_to_pipe_func(rs[D3DRS_ZFUNC]); + /* Disable depth write if no change can occur */ + dsa.depth.writemask = !!rs[D3DRS_ZWRITEENABLE] && + dsa.depth.func != PIPE_FUNC_EQUAL && + dsa.depth.func != PIPE_FUNC_NEVER; } if (rs[D3DRS_STENCILENABLE]) { |