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authorWladimir J. van der Laan <[email protected]>2017-11-01 18:19:01 +0100
committerChristian Gmeiner <[email protected]>2017-11-06 21:29:19 +0100
commitf1e1c60ff69dc54f3db00afa16237ff04dd32096 (patch)
tree2bd5bb7d840cbe4f0b2a6036d4af23299f349fd7 /src
parent4bcb48b8319fd8185a326bbd1f77191bddd35506 (diff)
etnaviv: Update from rnndb
Updated as of etnav_viv commit 3b4a8ec. Signed-off-by: Wladimir J. van der Laan <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/etnaviv/etnaviv_clear_blit.c2
-rw-r--r--src/gallium/drivers/etnaviv/etnaviv_format.c9
-rw-r--r--src/gallium/drivers/etnaviv/etnaviv_state.c2
-rw-r--r--src/gallium/drivers/etnaviv/etnaviv_transfer.c2
-rw-r--r--src/gallium/drivers/etnaviv/etnaviv_translate.h15
-rw-r--r--src/gallium/drivers/etnaviv/hw/cmdstream.xml.h20
-rw-r--r--src/gallium/drivers/etnaviv/hw/common.xml.h11
-rw-r--r--src/gallium/drivers/etnaviv/hw/common_3d.xml.h171
-rw-r--r--src/gallium/drivers/etnaviv/hw/isa.xml.h15
-rw-r--r--src/gallium/drivers/etnaviv/hw/state.xml.h210
-rw-r--r--src/gallium/drivers/etnaviv/hw/state_3d.xml.h402
-rw-r--r--src/gallium/drivers/etnaviv/hw/state_blt.xml.h282
-rw-r--r--src/gallium/drivers/etnaviv/hw/texdesc_3d.xml.h194
13 files changed, 1015 insertions, 320 deletions
diff --git a/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c b/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c
index 21f50b7c2e1..ff37a6b20af 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c
@@ -531,7 +531,7 @@ etna_try_rs_blit(struct pipe_context *pctx,
if (src->base.nr_samples > 1) {
uint32_t msaa_format = translate_msaa_format(src_format);
assert(msaa_format != ETNA_NO_MATCH);
- ts_mem_config |= VIVS_TS_MEM_CONFIG_MSAA | msaa_format;
+ ts_mem_config |= VIVS_TS_MEM_CONFIG_COLOR_COMPRESSION | msaa_format;
}
/* Always flush color and depth cache together before resolving. This works
diff --git a/src/gallium/drivers/etnaviv/etnaviv_format.c b/src/gallium/drivers/etnaviv/etnaviv_format.c
index ac9b2d13b98..987f6a80c4e 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_format.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_format.c
@@ -26,6 +26,7 @@
#include "etnaviv_format.h"
+#include "hw/common_3d.xml.h"
#include "hw/state.xml.h"
#include "hw/state_3d.xml.h"
@@ -62,7 +63,7 @@ struct etna_format {
/* vertex + texture */
#define VT(pipe, vtxfmt, texfmt, texswiz, rsfmt) \
[PIPE_FORMAT_##pipe] = { \
- .vtx = VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_##vtxfmt, \
+ .vtx = FE_DATA_TYPE_##vtxfmt, \
.tex = TEXTURE_FORMAT_##texfmt, \
.rs = RS_FORMAT_##rsfmt, \
.present = 1, \
@@ -82,7 +83,7 @@ struct etna_format {
/* vertex-only */
#define V_(pipe, fmt, rsfmt) \
[PIPE_FORMAT_##pipe] = { \
- .vtx = VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_##fmt, \
+ .vtx = FE_DATA_TYPE_##fmt, \
.tex = ETNA_NO_MATCH, \
.rs = RS_FORMAT_##rsfmt, \
.present = 1, \
@@ -173,8 +174,8 @@ static struct etna_format formats[PIPE_FORMAT_COUNT] = {
V_(R10G10B10A2_USCALED, UNSIGNED_INT_10_10_10_2, NONE),
V_(R10G10B10A2_SSCALED, INT_10_10_10_2, NONE),
- _T(X8Z24_UNORM, D24S8, SWIZ(X, Y, Z, W), A8R8G8B8),
- _T(S8_UINT_Z24_UNORM, D24S8, SWIZ(X, Y, Z, W), A8R8G8B8),
+ _T(X8Z24_UNORM, D24X8, SWIZ(X, Y, Z, W), A8R8G8B8),
+ _T(S8_UINT_Z24_UNORM, D24X8, SWIZ(X, Y, Z, W), A8R8G8B8),
/* 48-bit */
V_(R16G16B16_UNORM, UNSIGNED_SHORT, NONE),
diff --git a/src/gallium/drivers/etnaviv/etnaviv_state.c b/src/gallium/drivers/etnaviv/etnaviv_state.c
index ba62c5f194a..59a72816462 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_state.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_state.c
@@ -177,7 +177,7 @@ etna_set_framebuffer_state(struct pipe_context *pctx,
/* MSAA */
if (cbuf->base.texture->nr_samples > 1)
ts_mem_config |=
- VIVS_TS_MEM_CONFIG_MSAA | translate_msaa_format(cbuf->base.format);
+ VIVS_TS_MEM_CONFIG_COLOR_COMPRESSION | translate_msaa_format(cbuf->base.format);
nr_samples_color = cbuf->base.texture->nr_samples;
} else {
diff --git a/src/gallium/drivers/etnaviv/etnaviv_transfer.c b/src/gallium/drivers/etnaviv/etnaviv_transfer.c
index c3899207098..aaaa1e61efe 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_transfer.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_transfer.c
@@ -40,6 +40,8 @@
#include "util/u_surface.h"
#include "util/u_transfer.h"
+#include "hw/common_3d.xml.h"
+
#include <drm_fourcc.h>
/* Compute offset into a 1D/2D/3D buffer of a certain box.
diff --git a/src/gallium/drivers/etnaviv/etnaviv_translate.h b/src/gallium/drivers/etnaviv/etnaviv_translate.h
index 0761251a369..7c85f81a707 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_translate.h
+++ b/src/gallium/drivers/etnaviv/etnaviv_translate.h
@@ -33,6 +33,7 @@
#include "etnaviv_tiling.h"
#include "etnaviv_util.h"
#include "hw/cmdstream.xml.h"
+#include "hw/common_3d.xml.h"
#include "hw/state.xml.h"
#include "hw/state_3d.xml.h"
@@ -283,19 +284,19 @@ translate_msaa_format(enum pipe_format fmt)
/* Note: Pipe format convention is LSB to MSB, VIVS is MSB to LSB */
switch (fmt) {
case PIPE_FORMAT_B4G4R4X4_UNORM:
- return VIVS_TS_MEM_CONFIG_MSAA_FORMAT_A4R4G4B4;
+ return COLOR_COMPRESSION_FORMAT_A4R4G4B4;
case PIPE_FORMAT_B4G4R4A4_UNORM:
- return VIVS_TS_MEM_CONFIG_MSAA_FORMAT_A4R4G4B4;
+ return COLOR_COMPRESSION_FORMAT_A4R4G4B4;
case PIPE_FORMAT_B5G5R5X1_UNORM:
- return VIVS_TS_MEM_CONFIG_MSAA_FORMAT_A1R5G5B5;
+ return COLOR_COMPRESSION_FORMAT_A1R5G5B5;
case PIPE_FORMAT_B5G5R5A1_UNORM:
- return VIVS_TS_MEM_CONFIG_MSAA_FORMAT_A1R5G5B5;
+ return COLOR_COMPRESSION_FORMAT_A1R5G5B5;
case PIPE_FORMAT_B5G6R5_UNORM:
- return VIVS_TS_MEM_CONFIG_MSAA_FORMAT_R5G6B5;
+ return COLOR_COMPRESSION_FORMAT_R5G6B5;
case PIPE_FORMAT_B8G8R8X8_UNORM:
- return VIVS_TS_MEM_CONFIG_MSAA_FORMAT_X8R8G8B8;
+ return COLOR_COMPRESSION_FORMAT_X8R8G8B8;
case PIPE_FORMAT_B8G8R8A8_UNORM:
- return VIVS_TS_MEM_CONFIG_MSAA_FORMAT_A8R8G8B8;
+ return COLOR_COMPRESSION_FORMAT_A8R8G8B8;
/* MSAA with YUYV not supported */
default:
return ETNA_NO_MATCH;
diff --git a/src/gallium/drivers/etnaviv/hw/cmdstream.xml.h b/src/gallium/drivers/etnaviv/hw/cmdstream.xml.h
index e12188ea52c..63d4e9342eb 100644
--- a/src/gallium/drivers/etnaviv/hw/cmdstream.xml.h
+++ b/src/gallium/drivers/etnaviv/hw/cmdstream.xml.h
@@ -8,9 +8,9 @@ http://0x04.net/cgit/index.cgi/rules-ng-ng
git clone git://0x04.net/rules-ng-ng
The rules-ng-ng source files this header was generated from are:
-- cmdstream.xml ( 16595 bytes, from 2017-10-05 21:20:32)
-- copyright.xml ( 1597 bytes, from 2016-11-13 13:46:17)
-- common.xml ( 26135 bytes, from 2017-10-05 21:20:32)
+- cmdstream.xml ( 16929 bytes, from 2017-10-13 12:22:46)
+- copyright.xml ( 1597 bytes, from 2016-10-29 07:29:22)
+- common.xml ( 26187 bytes, from 2017-10-31 19:05:01)
Copyright (C) 2012-2017 by the following authors:
- Wladimir J. van der Laan <[email protected]>
@@ -53,6 +53,7 @@ DEALINGS IN THE SOFTWARE.
#define FE_OPCODE_DRAW_INSTANCED 0x0000000c
#define FE_OPCODE_CHIP_SELECT 0x0000000d
#define FE_OPCODE_WAIT_FENCE 0x0000000f
+#define FE_OPCODE_DRAW_INDIRECT 0x00000010
#define FE_OPCODE_SNAP_PAGES 0x00000013
#define PRIMITIVE_TYPE_POINTS 0x00000001
#define PRIMITIVE_TYPE_LINES 0x00000002
@@ -286,6 +287,19 @@ DEALINGS IN THE SOFTWARE.
#define VIV_FE_WAIT_FENCE_ADDRESS 0x00000004
+#define VIV_FE_DRAW_INDIRECT 0x00000000
+
+#define VIV_FE_DRAW_INDIRECT_HEADER 0x00000000
+#define VIV_FE_DRAW_INDIRECT_HEADER_OP__MASK 0xf8000000
+#define VIV_FE_DRAW_INDIRECT_HEADER_OP__SHIFT 27
+#define VIV_FE_DRAW_INDIRECT_HEADER_OP_DRAW_INDIRECT 0x80000000
+#define VIV_FE_DRAW_INDIRECT_HEADER_UNK8 0x00000100
+#define VIV_FE_DRAW_INDIRECT_HEADER_TYPE__MASK 0x0000000f
+#define VIV_FE_DRAW_INDIRECT_HEADER_TYPE__SHIFT 0
+#define VIV_FE_DRAW_INDIRECT_HEADER_TYPE(x) (((x) << VIV_FE_DRAW_INDIRECT_HEADER_TYPE__SHIFT) & VIV_FE_DRAW_INDIRECT_HEADER_TYPE__MASK)
+
+#define VIV_FE_DRAW_INDIRECT_ADDRESS 0x00000004
+
#define VIV_FE_SNAP_PAGES 0x00000000
#define VIV_FE_SNAP_PAGES_HEADER 0x00000000
diff --git a/src/gallium/drivers/etnaviv/hw/common.xml.h b/src/gallium/drivers/etnaviv/hw/common.xml.h
index 57369d741da..b98fa8418d4 100644
--- a/src/gallium/drivers/etnaviv/hw/common.xml.h
+++ b/src/gallium/drivers/etnaviv/hw/common.xml.h
@@ -8,13 +8,10 @@ http://0x04.net/cgit/index.cgi/rules-ng-ng
git clone git://0x04.net/rules-ng-ng
The rules-ng-ng source files this header was generated from are:
-- state.xml ( 26245 bytes, from 2017-10-05 21:32:06)
-- common.xml ( 26135 bytes, from 2017-10-05 21:20:32)
-- state_hi.xml ( 27733 bytes, from 2017-10-05 21:20:32)
-- copyright.xml ( 1597 bytes, from 2016-11-13 13:46:17)
-- state_2d.xml ( 51552 bytes, from 2016-11-13 13:46:17)
-- state_3d.xml ( 80819 bytes, from 2017-10-05 21:20:32)
-- state_vg.xml ( 5975 bytes, from 2016-11-13 13:46:17)
+- texdesc_3d.xml ( 3183 bytes, from 2017-10-31 19:05:01)
+- copyright.xml ( 1597 bytes, from 2016-10-29 07:29:22)
+- common.xml ( 26187 bytes, from 2017-10-31 19:05:01)
+- common_3d.xml ( 14547 bytes, from 2017-11-01 16:08:07)
Copyright (C) 2012-2017 by the following authors:
- Wladimir J. van der Laan <[email protected]>
diff --git a/src/gallium/drivers/etnaviv/hw/common_3d.xml.h b/src/gallium/drivers/etnaviv/hw/common_3d.xml.h
new file mode 100644
index 00000000000..8f19d5b90f0
--- /dev/null
+++ b/src/gallium/drivers/etnaviv/hw/common_3d.xml.h
@@ -0,0 +1,171 @@
+#ifndef COMMON_3D_XML
+#define COMMON_3D_XML
+
+/* Autogenerated file, DO NOT EDIT manually!
+
+This file was generated by the rules-ng-ng headergen tool in this git repository:
+http://0x04.net/cgit/index.cgi/rules-ng-ng
+git clone git://0x04.net/rules-ng-ng
+
+The rules-ng-ng source files this header was generated from are:
+- texdesc_3d.xml ( 3183 bytes, from 2017-10-31 19:05:01)
+- copyright.xml ( 1597 bytes, from 2016-10-29 07:29:22)
+- common.xml ( 26187 bytes, from 2017-10-31 19:05:01)
+- common_3d.xml ( 14547 bytes, from 2017-11-01 16:08:07)
+
+Copyright (C) 2012-2017 by the following authors:
+- Wladimir J. van der Laan <[email protected]>
+- Christian Gmeiner <[email protected]>
+- Lucas Stach <[email protected]>
+- Russell King <[email protected]>
+
+Permission is hereby granted, free of charge, to any person obtaining a
+copy of this software and associated documentation files (the "Software"),
+to deal in the Software without restriction, including without limitation
+the rights to use, copy, modify, merge, publish, distribute, sub license,
+and/or sell copies of the Software, and to permit persons to whom the
+Software is furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice (including the
+next paragraph) shall be included in all copies or substantial portions
+of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+DEALINGS IN THE SOFTWARE.
+*/
+
+
+#define TEXTURE_FORMAT_NONE 0x00000000
+#define TEXTURE_FORMAT_A8 0x00000001
+#define TEXTURE_FORMAT_L8 0x00000002
+#define TEXTURE_FORMAT_I8 0x00000003
+#define TEXTURE_FORMAT_A8L8 0x00000004
+#define TEXTURE_FORMAT_A4R4G4B4 0x00000005
+#define TEXTURE_FORMAT_X4R4G4B4 0x00000006
+#define TEXTURE_FORMAT_A8R8G8B8 0x00000007
+#define TEXTURE_FORMAT_X8R8G8B8 0x00000008
+#define TEXTURE_FORMAT_A8B8G8R8 0x00000009
+#define TEXTURE_FORMAT_X8B8G8R8 0x0000000a
+#define TEXTURE_FORMAT_R5G6B5 0x0000000b
+#define TEXTURE_FORMAT_A1R5G5B5 0x0000000c
+#define TEXTURE_FORMAT_X1R5G5B5 0x0000000d
+#define TEXTURE_FORMAT_YUY2 0x0000000e
+#define TEXTURE_FORMAT_UYVY 0x0000000f
+#define TEXTURE_FORMAT_D16 0x00000010
+#define TEXTURE_FORMAT_D24X8 0x00000011
+#define TEXTURE_FORMAT_DXT1 0x00000013
+#define TEXTURE_FORMAT_DXT2_DXT3 0x00000014
+#define TEXTURE_FORMAT_DXT4_DXT5 0x00000015
+#define TEXTURE_FORMAT_E5B9G9R9 0x0000001d
+#define TEXTURE_FORMAT_ETC1 0x0000001e
+#define TEXTURE_FORMAT_EXT_NONE 0x00000000
+#define TEXTURE_FORMAT_EXT_RGB8_PUNCHTHROUGH_ALPHA1_ETC2 0x00000001
+#define TEXTURE_FORMAT_EXT_RGBA8_ETC2_EAC 0x00000002
+#define TEXTURE_FORMAT_EXT_R11_EAC 0x00000003
+#define TEXTURE_FORMAT_EXT_RG11_EAC 0x00000004
+#define TEXTURE_FORMAT_EXT_SIGNED_RG11_EAC 0x00000005
+#define TEXTURE_FORMAT_EXT_G8R8 0x00000006
+#define TEXTURE_FORMAT_EXT_R16F 0x00000007
+#define TEXTURE_FORMAT_EXT_G16R16F 0x00000008
+#define TEXTURE_FORMAT_EXT_A16B16G16R16F 0x00000009
+#define TEXTURE_FORMAT_EXT_R32F 0x0000000a
+#define TEXTURE_FORMAT_EXT_G32R32F 0x0000000b
+#define TEXTURE_FORMAT_EXT_A2B10G10R10 0x0000000c
+#define TEXTURE_FORMAT_EXT_SIGNED_R11_EAC 0x0000000d
+#define TEXTURE_FORMAT_EXT_R8_SNORM 0x0000000e
+#define TEXTURE_FORMAT_EXT_G8R8_SNORM 0x0000000f
+#define TEXTURE_FORMAT_EXT_X8B8G8R8_SNORM 0x00000010
+#define TEXTURE_FORMAT_EXT_A8B8G8R8_SNORM 0x00000011
+#define TEXTURE_FORMAT_EXT_ASTC 0x00000014
+#define TEXTURE_FORMAT_EXT_R8I 0x00000015
+#define TEXTURE_FORMAT_EXT_G8R8I 0x00000016
+#define TEXTURE_FORMAT_EXT_A8B8G8R8I 0x00000017
+#define TEXTURE_FORMAT_EXT_R16I 0x00000018
+#define TEXTURE_FORMAT_EXT_G16R16I 0x00000019
+#define TEXTURE_FORMAT_EXT_A16B16G16R16I 0x0000001a
+#define TEXTURE_FORMAT_EXT_B10G11R11F 0x0000001b
+#define TEXTURE_FORMAT_EXT_A2B10G10R10UI 0x0000001c
+#define TEXTURE_FORMAT_EXT_R8 0x00000021
+#define TEXTURE_FORMAT_EXT_D24S8 0x00000022
+#define TEXTURE_FORMAT_EXT_R32I 0x00000023
+#define TEXTURE_FORMAT_EXT_G32R32I 0x00000024
+#define TEXTURE_FORMAT_EXT_AYUV 0x00000025
+#define TEXTURE_FILTER_NONE 0x00000000
+#define TEXTURE_FILTER_NEAREST 0x00000001
+#define TEXTURE_FILTER_LINEAR 0x00000002
+#define TEXTURE_FILTER_ANISOTROPIC 0x00000003
+#define TEXTURE_TYPE_NONE 0x00000000
+#define TEXTURE_TYPE_1D 0x00000001
+#define TEXTURE_TYPE_2D 0x00000002
+#define TEXTURE_TYPE_3D 0x00000003
+#define TEXTURE_TYPE_CUBE_MAP 0x00000005
+#define TEXTURE_WRAPMODE_REPEAT 0x00000000
+#define TEXTURE_WRAPMODE_MIRRORED_REPEAT 0x00000001
+#define TEXTURE_WRAPMODE_CLAMP_TO_EDGE 0x00000002
+#define TEXTURE_WRAPMODE_CLAMP_TO_BORDER 0x00000003
+#define TEXTURE_FACE_POS_X 0x00000000
+#define TEXTURE_FACE_NEG_X 0x00000001
+#define TEXTURE_FACE_POS_Y 0x00000002
+#define TEXTURE_FACE_NEG_Y 0x00000003
+#define TEXTURE_FACE_POS_Z 0x00000004
+#define TEXTURE_FACE_NEG_Z 0x00000005
+#define TEXTURE_SWIZZLE_RED 0x00000000
+#define TEXTURE_SWIZZLE_GREEN 0x00000001
+#define TEXTURE_SWIZZLE_BLUE 0x00000002
+#define TEXTURE_SWIZZLE_ALPHA 0x00000003
+#define TEXTURE_SWIZZLE_ZERO 0x00000004
+#define TEXTURE_SWIZZLE_ONE 0x00000005
+#define TEXTURE_HALIGN_FOUR 0x00000000
+#define TEXTURE_HALIGN_SIXTEEN 0x00000001
+#define TEXTURE_HALIGN_SUPER_TILED 0x00000002
+#define TEXTURE_HALIGN_SPLIT_TILED 0x00000003
+#define TEXTURE_HALIGN_SPLIT_SUPER_TILED 0x00000004
+#define TS_CACHE_MODE_128 0x00000000
+#define TS_CACHE_MODE_256 0x00000001
+#define COLOR_COMPRESSION_FORMAT_A4R4G4B4 0x00000000
+#define COLOR_COMPRESSION_FORMAT_A1R5G5B5 0x00000001
+#define COLOR_COMPRESSION_FORMAT_R5G6B5 0x00000002
+#define COLOR_COMPRESSION_FORMAT_A8R8G8B8 0x00000003
+#define COLOR_COMPRESSION_FORMAT_X8R8G8B8 0x00000004
+#define COLOR_COMPRESSION_FORMAT_D24S8 0x00000005
+#define TEXTURE_FORMAT_ASTC_RGBA_4x4 0x00000000
+#define TEXTURE_FORMAT_ASTC_RGBA_5x4 0x00000001
+#define TEXTURE_FORMAT_ASTC_RGBA_5x5 0x00000002
+#define TEXTURE_FORMAT_ASTC_RGBA_6x5 0x00000003
+#define TEXTURE_FORMAT_ASTC_RGBA_6x6 0x00000004
+#define TEXTURE_FORMAT_ASTC_RGBA_8x5 0x00000005
+#define TEXTURE_FORMAT_ASTC_RGBA_8x6 0x00000006
+#define TEXTURE_FORMAT_ASTC_RGBA_8x8 0x00000007
+#define TEXTURE_FORMAT_ASTC_RGBA_10x5 0x00000008
+#define TEXTURE_FORMAT_ASTC_RGBA_10x6 0x00000009
+#define TEXTURE_FORMAT_ASTC_RGBA_10x8 0x0000000a
+#define TEXTURE_FORMAT_ASTC_RGBA_10x10 0x0000000b
+#define TEXTURE_FORMAT_ASTC_RGBA_12x10 0x0000000c
+#define TEXTURE_FORMAT_ASTC_RGBA_12x12 0x0000000d
+#define TEXTURE_FORMAT_ASTC_SRGB8_ALPHA8_4x4 0x00000010
+#define TEXTURE_FORMAT_ASTC_SRGB8_ALPHA8_5x4 0x00000011
+#define TEXTURE_FORMAT_ASTC_SRGB8_ALPHA8_5x5 0x00000012
+#define TEXTURE_FORMAT_ASTC_SRGB8_ALPHA8_6x5 0x00000013
+#define TEXTURE_FORMAT_ASTC_SRGB8_ALPHA8_6x6 0x00000014
+#define TEXTURE_FORMAT_ASTC_SRGB8_ALPHA8_8x5 0x00000015
+#define TEXTURE_FORMAT_ASTC_SRGB8_ALPHA8_8x6 0x00000016
+#define TEXTURE_FORMAT_ASTC_SRGB8_ALPHA8_8x8 0x00000017
+#define TEXTURE_FORMAT_ASTC_SRGB8_ALPHA8_10x5 0x00000018
+#define TEXTURE_FORMAT_ASTC_SRGB8_ALPHA8_10x6 0x00000019
+#define TEXTURE_FORMAT_ASTC_SRGB8_ALPHA8_10x8 0x0000001a
+#define TEXTURE_FORMAT_ASTC_SRGB8_ALPHA8_10x10 0x0000001b
+#define TEXTURE_FORMAT_ASTC_SRGB8_ALPHA8_12x10 0x0000001c
+#define TEXTURE_FORMAT_ASTC_SRGB8_ALPHA8_12x12 0x0000001d
+#define TE_SAMPLER_CONFIG2_UNK16 0x00010000
+#define TE_SAMPLER_CONFIG2_UNK17 0x00020000
+#define TE_SAMPLER_CONFIG2_UNK18 0x00040000
+#define TE_SAMPLER_CONFIG2_UNK19 0x00080000
+#define TE_SAMPLER_CONFIG2_UNK23 0x00800000
+#define TE_SAMPLER_CONFIG3_MSAA 0x00000008
+
+#endif /* COMMON_3D_XML */
diff --git a/src/gallium/drivers/etnaviv/hw/isa.xml.h b/src/gallium/drivers/etnaviv/hw/isa.xml.h
index f89ab0a0aeb..ae49054509c 100644
--- a/src/gallium/drivers/etnaviv/hw/isa.xml.h
+++ b/src/gallium/drivers/etnaviv/hw/isa.xml.h
@@ -8,8 +8,8 @@ http://0x04.net/cgit/index.cgi/rules-ng-ng
git clone git://0x04.net/rules-ng-ng
The rules-ng-ng source files this header was generated from are:
-- isa.xml ( 35432 bytes, from 2017-10-05 21:20:32)
-- copyright.xml ( 1597 bytes, from 2016-11-13 13:46:17)
+- isa.xml ( 37079 bytes, from 2017-10-19 09:48:25)
+- copyright.xml ( 1597 bytes, from 2016-10-29 07:29:22)
Copyright (C) 2012-2017 by the following authors:
- Wladimir J. van der Laan <[email protected]>
@@ -202,6 +202,9 @@ DEALINGS IN THE SOFTWARE.
#define INST_TYPE_S16 0x00000005
#define INST_TYPE_U32 0x00000006
#define INST_TYPE_U8 0x00000007
+#define INST_ROUND_MODE_DEFAULT 0x00000000
+#define INST_ROUND_MODE_RTZ 0x00000001
+#define INST_ROUND_MODE_RTNE 0x00000002
#define INST_COMPS_X 0x00000001
#define INST_COMPS_Y 0x00000002
#define INST_COMPS_Z 0x00000004
@@ -244,6 +247,10 @@ DEALINGS IN THE SOFTWARE.
#define VIV_ISA_WORD_1_TEX_AMODE__MASK 0x00000007
#define VIV_ISA_WORD_1_TEX_AMODE__SHIFT 0
#define VIV_ISA_WORD_1_TEX_AMODE(x) (((x) << VIV_ISA_WORD_1_TEX_AMODE__SHIFT) & VIV_ISA_WORD_1_TEX_AMODE__MASK)
+#define VIV_ISA_WORD_1_RMODE__MASK 0x00000003
+#define VIV_ISA_WORD_1_RMODE__SHIFT 0
+#define VIV_ISA_WORD_1_RMODE(x) (((x) << VIV_ISA_WORD_1_RMODE__SHIFT) & VIV_ISA_WORD_1_RMODE__MASK)
+#define VIV_ISA_WORD_1_PMODE 0x00000004
#define VIV_ISA_WORD_1_TEX_SWIZ__MASK 0x000007f8
#define VIV_ISA_WORD_1_TEX_SWIZ__SHIFT 3
#define VIV_ISA_WORD_1_TEX_SWIZ(x) (((x) << VIV_ISA_WORD_1_TEX_SWIZ__SHIFT) & VIV_ISA_WORD_1_TEX_SWIZ__MASK)
@@ -293,13 +300,13 @@ DEALINGS IN THE SOFTWARE.
#define VIV_ISA_WORD_3_SRC2_REG__MASK 0x00001ff0
#define VIV_ISA_WORD_3_SRC2_REG__SHIFT 4
#define VIV_ISA_WORD_3_SRC2_REG(x) (((x) << VIV_ISA_WORD_3_SRC2_REG__SHIFT) & VIV_ISA_WORD_3_SRC2_REG__MASK)
-#define VIV_ISA_WORD_3_UNK3_13 0x00002000
+#define VIV_ISA_WORD_3_SEL_BIT0 0x00002000
#define VIV_ISA_WORD_3_SRC2_SWIZ__MASK 0x003fc000
#define VIV_ISA_WORD_3_SRC2_SWIZ__SHIFT 14
#define VIV_ISA_WORD_3_SRC2_SWIZ(x) (((x) << VIV_ISA_WORD_3_SRC2_SWIZ__SHIFT) & VIV_ISA_WORD_3_SRC2_SWIZ__MASK)
#define VIV_ISA_WORD_3_SRC2_NEG 0x00400000
#define VIV_ISA_WORD_3_SRC2_ABS 0x00800000
-#define VIV_ISA_WORD_3_UNK3_24 0x01000000
+#define VIV_ISA_WORD_3_SEL_BIT1 0x01000000
#define VIV_ISA_WORD_3_SRC2_AMODE__MASK 0x0e000000
#define VIV_ISA_WORD_3_SRC2_AMODE__SHIFT 25
#define VIV_ISA_WORD_3_SRC2_AMODE(x) (((x) << VIV_ISA_WORD_3_SRC2_AMODE__SHIFT) & VIV_ISA_WORD_3_SRC2_AMODE__MASK)
diff --git a/src/gallium/drivers/etnaviv/hw/state.xml.h b/src/gallium/drivers/etnaviv/hw/state.xml.h
index 729d0ee08f0..0a93a4f9d55 100644
--- a/src/gallium/drivers/etnaviv/hw/state.xml.h
+++ b/src/gallium/drivers/etnaviv/hw/state.xml.h
@@ -8,13 +8,15 @@ http://0x04.net/cgit/index.cgi/rules-ng-ng
git clone git://0x04.net/rules-ng-ng
The rules-ng-ng source files this header was generated from are:
-- state.xml ( 26245 bytes, from 2017-10-05 21:32:06)
-- common.xml ( 26135 bytes, from 2017-10-05 21:20:32)
-- state_hi.xml ( 27733 bytes, from 2017-10-05 21:20:32)
-- copyright.xml ( 1597 bytes, from 2016-11-13 13:46:17)
-- state_2d.xml ( 51552 bytes, from 2016-11-13 13:46:17)
-- state_3d.xml ( 80819 bytes, from 2017-10-05 21:20:32)
-- state_vg.xml ( 5975 bytes, from 2016-11-13 13:46:17)
+- state.xml ( 26087 bytes, from 2017-10-30 13:44:54)
+- common.xml ( 26187 bytes, from 2017-10-31 19:05:01)
+- common_3d.xml ( 14547 bytes, from 2017-11-01 16:08:07)
+- state_hi.xml ( 27733 bytes, from 2017-10-02 19:00:30)
+- copyright.xml ( 1597 bytes, from 2016-10-29 07:29:22)
+- state_2d.xml ( 51552 bytes, from 2016-10-29 07:29:22)
+- state_3d.xml ( 79520 bytes, from 2017-10-31 19:05:01)
+- state_blt.xml ( 13405 bytes, from 2017-10-16 17:42:46)
+- state_vg.xml ( 5975 bytes, from 2016-10-29 07:29:22)
Copyright (C) 2012-2017 by the following authors:
- Wladimir J. van der Laan <[email protected]>
@@ -47,6 +49,19 @@ DEALINGS IN THE SOFTWARE.
#define VARYING_COMPONENT_USE_USED 0x00000001
#define VARYING_COMPONENT_USE_POINTCOORD_X 0x00000002
#define VARYING_COMPONENT_USE_POINTCOORD_Y 0x00000003
+#define FE_DATA_TYPE_BYTE 0x00000000
+#define FE_DATA_TYPE_UNSIGNED_BYTE 0x00000001
+#define FE_DATA_TYPE_SHORT 0x00000002
+#define FE_DATA_TYPE_UNSIGNED_SHORT 0x00000003
+#define FE_DATA_TYPE_INT 0x00000004
+#define FE_DATA_TYPE_UNSIGNED_INT 0x00000005
+#define FE_DATA_TYPE_FLOAT 0x00000008
+#define FE_DATA_TYPE_HALF_FLOAT 0x00000009
+#define FE_DATA_TYPE_FIXED 0x0000000b
+#define FE_DATA_TYPE_INT_10_10_10_2 0x0000000c
+#define FE_DATA_TYPE_UNSIGNED_INT_10_10_10_2 0x0000000d
+#define FE_DATA_TYPE_BYTE_I 0x0000000e
+#define FE_DATA_TYPE_SHORT_I 0x0000000f
#define FE_VERTEX_STREAM_CONTROL_VERTEX_STRIDE__MASK 0x000000ff
#define FE_VERTEX_STREAM_CONTROL_VERTEX_STRIDE__SHIFT 0
#define FE_VERTEX_STREAM_CONTROL_VERTEX_STRIDE(x) (((x) << FE_VERTEX_STREAM_CONTROL_VERTEX_STRIDE__SHIFT) & FE_VERTEX_STREAM_CONTROL_VERTEX_STRIDE__MASK)
@@ -60,17 +75,7 @@ DEALINGS IN THE SOFTWARE.
#define VIVS_FE_VERTEX_ELEMENT_CONFIG__LEN 0x00000010
#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE__MASK 0x0000000f
#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE__SHIFT 0
-#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_BYTE 0x00000000
-#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_UNSIGNED_BYTE 0x00000001
-#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_SHORT 0x00000002
-#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_UNSIGNED_SHORT 0x00000003
-#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_INT 0x00000004
-#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_UNSIGNED_INT 0x00000005
-#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_FLOAT 0x00000008
-#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_HALF_FLOAT 0x00000009
-#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_FIXED 0x0000000b
-#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_INT_10_10_10_2 0x0000000c
-#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_UNSIGNED_INT_10_10_10_2 0x0000000d
+#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE(x) (((x) << VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE__SHIFT) & VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE__MASK)
#define VIVS_FE_VERTEX_ELEMENT_CONFIG_ENDIAN__MASK 0x00000030
#define VIVS_FE_VERTEX_ELEMENT_CONFIG_ENDIAN__SHIFT 4
#define VIVS_FE_VERTEX_ELEMENT_CONFIG_ENDIAN(x) (((x) << VIVS_FE_VERTEX_ELEMENT_CONFIG_ENDIAN__SHIFT) & VIVS_FE_VERTEX_ELEMENT_CONFIG_ENDIAN__MASK)
@@ -202,7 +207,7 @@ DEALINGS IN THE SOFTWARE.
#define VIVS_FE_GENERIC_ATTRIB_UNK00740(i0) (0x00000740 + 0x4*(i0))
-#define VIVS_FE_GENERIC_ATTRIB_UNK00780(i0) (0x00000780 + 0x4*(i0))
+#define VIVS_FE_GENERIC_ATTRIB_SCALE(i0) (0x00000780 + 0x4*(i0))
#define VIVS_FE_HALTI5_UNK007C4 0x000007c4
@@ -240,6 +245,7 @@ DEALINGS IN THE SOFTWARE.
#define VIVS_GL_EVENT_EVENT_ID(x) (((x) << VIVS_GL_EVENT_EVENT_ID__SHIFT) & VIVS_GL_EVENT_EVENT_ID__MASK)
#define VIVS_GL_EVENT_FROM_FE 0x00000020
#define VIVS_GL_EVENT_FROM_PE 0x00000040
+#define VIVS_GL_EVENT_FROM_BLT 0x00000080
#define VIVS_GL_EVENT_SOURCE__MASK 0x00001f00
#define VIVS_GL_EVENT_SOURCE__SHIFT 8
#define VIVS_GL_EVENT_SOURCE(x) (((x) << VIVS_GL_EVENT_SOURCE__SHIFT) & VIVS_GL_EVENT_SOURCE__MASK)
@@ -303,30 +309,6 @@ DEALINGS IN THE SOFTWARE.
#define VIVS_GL_VARYING_TOTAL_COMPONENTS_NUM(x) (((x) << VIVS_GL_VARYING_TOTAL_COMPONENTS_NUM__SHIFT) & VIVS_GL_VARYING_TOTAL_COMPONENTS_NUM__MASK)
#define VIVS_GL_VARYING_NUM_COMPONENTS 0x00003820
-#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR0__MASK 0x00000007
-#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR0__SHIFT 0
-#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR0(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR0__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR0__MASK)
-#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR1__MASK 0x00000070
-#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR1__SHIFT 4
-#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR1(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR1__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR1__MASK)
-#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR2__MASK 0x00000700
-#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR2__SHIFT 8
-#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR2(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR2__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR2__MASK)
-#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR3__MASK 0x00007000
-#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR3__SHIFT 12
-#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR3(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR3__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR3__MASK)
-#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR4__MASK 0x00070000
-#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR4__SHIFT 16
-#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR4(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR4__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR4__MASK)
-#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR5__MASK 0x00700000
-#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR5__SHIFT 20
-#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR5(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR5__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR5__MASK)
-#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR6__MASK 0x07000000
-#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR6__SHIFT 24
-#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR6(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR6__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR6__MASK)
-#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR7__MASK 0x70000000
-#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR7__SHIFT 28
-#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR7(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR7__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR7__MASK)
#define VIVS_GL_OCCLUSION_QUERY_ADDR 0x00003824
@@ -407,7 +389,19 @@ DEALINGS IN THE SOFTWARE.
#define VIVS_GL_HALTI5_UNK03884 0x00003884
-#define VIVS_GL_HALTI5_UNK03888 0x00003888
+#define VIVS_GL_HALTI5_SH_SPECIALS 0x00003888
+#define VIVS_GL_HALTI5_SH_SPECIALS_VS_PSIZE_OUT__MASK 0x0000007f
+#define VIVS_GL_HALTI5_SH_SPECIALS_VS_PSIZE_OUT__SHIFT 0
+#define VIVS_GL_HALTI5_SH_SPECIALS_VS_PSIZE_OUT(x) (((x) << VIVS_GL_HALTI5_SH_SPECIALS_VS_PSIZE_OUT__SHIFT) & VIVS_GL_HALTI5_SH_SPECIALS_VS_PSIZE_OUT__MASK)
+#define VIVS_GL_HALTI5_SH_SPECIALS_PS_PCOORD_IN__MASK 0x00007f00
+#define VIVS_GL_HALTI5_SH_SPECIALS_PS_PCOORD_IN__SHIFT 8
+#define VIVS_GL_HALTI5_SH_SPECIALS_PS_PCOORD_IN(x) (((x) << VIVS_GL_HALTI5_SH_SPECIALS_PS_PCOORD_IN__SHIFT) & VIVS_GL_HALTI5_SH_SPECIALS_PS_PCOORD_IN__MASK)
+#define VIVS_GL_HALTI5_SH_SPECIALS_UNK16__MASK 0x007f0000
+#define VIVS_GL_HALTI5_SH_SPECIALS_UNK16__SHIFT 16
+#define VIVS_GL_HALTI5_SH_SPECIALS_UNK16(x) (((x) << VIVS_GL_HALTI5_SH_SPECIALS_UNK16__SHIFT) & VIVS_GL_HALTI5_SH_SPECIALS_UNK16__MASK)
+#define VIVS_GL_HALTI5_SH_SPECIALS_UNK24__MASK 0xff000000
+#define VIVS_GL_HALTI5_SH_SPECIALS_UNK24__SHIFT 24
+#define VIVS_GL_HALTI5_SH_SPECIALS_UNK24(x) (((x) << VIVS_GL_HALTI5_SH_SPECIALS_UNK24__SHIFT) & VIVS_GL_HALTI5_SH_SPECIALS_UNK24__MASK)
#define VIVS_GL_GS_UNK0388C 0x0000388c
@@ -461,96 +455,44 @@ DEALINGS IN THE SOFTWARE.
#define VIVS_NFE_VERTEX_STREAMS_ROBUSTNESS_UNK146C0(i0) (0x000146c0 + 0x4*(i0))
-#define VIVS_NFE_HALTI5_UNK17800(i0) (0x00017800 + 0x4*(i0))
-#define VIVS_NFE_HALTI5_UNK17800__ESIZE 0x00000004
-#define VIVS_NFE_HALTI5_UNK17800__LEN 0x00000020
-
-#define VIVS_NFE_HALTI5_UNK17880(i0) (0x00017880 + 0x4*(i0))
-#define VIVS_NFE_HALTI5_UNK17880__ESIZE 0x00000004
-#define VIVS_NFE_HALTI5_UNK17880__LEN 0x00000020
-
-#define VIVS_NFE_HALTI5_UNK17900(i0) (0x00017900 + 0x4*(i0))
-#define VIVS_NFE_HALTI5_UNK17900__ESIZE 0x00000004
-#define VIVS_NFE_HALTI5_UNK17900__LEN 0x00000020
-
-#define VIVS_NFE_HALTI5_UNK17980(i0) (0x00017980 + 0x4*(i0))
-#define VIVS_NFE_HALTI5_UNK17980__ESIZE 0x00000004
-#define VIVS_NFE_HALTI5_UNK17980__LEN 0x00000020
-
-#define VIVS_NFE_HALTI5_UNK17A00(i0) (0x00017a00 + 0x4*(i0))
-#define VIVS_NFE_HALTI5_UNK17A00__ESIZE 0x00000004
-#define VIVS_NFE_HALTI5_UNK17A00__LEN 0x00000020
-
-#define VIVS_NFE_HALTI5_UNK17A80(i0) (0x00017a80 + 0x4*(i0))
-#define VIVS_NFE_HALTI5_UNK17A80__ESIZE 0x00000004
-#define VIVS_NFE_HALTI5_UNK17A80__LEN 0x00000020
-
-#define VIVS_BLT 0x00000000
-
-#define VIVS_BLT_UNK14000 0x00014000
-
-#define VIVS_BLT_UNK14008 0x00014008
-
-#define VIVS_BLT_UNK1400C 0x0001400c
-
-#define VIVS_BLT_UNK14010 0x00014010
-
-#define VIVS_BLT_UNK14014 0x00014014
-
-#define VIVS_BLT_UNK14018 0x00014018
-
-#define VIVS_BLT_UNK14020 0x00014020
-
-#define VIVS_BLT_UNK14024 0x00014024
-
-#define VIVS_BLT_UNK14028 0x00014028
-
-#define VIVS_BLT_UNK1402C 0x0001402c
-
-#define VIVS_BLT_UNK14030 0x00014030
-
-#define VIVS_BLT_UNK14034 0x00014034
-
-#define VIVS_BLT_UNK14038 0x00014038
-
-#define VIVS_BLT_UNK1403C 0x0001403c
-
-#define VIVS_BLT_UNK14040 0x00014040
-
-#define VIVS_BLT_UNK14044 0x00014044
-
-#define VIVS_BLT_UNK14048 0x00014048
-
-#define VIVS_BLT_UNK1404C 0x0001404c
-
-#define VIVS_BLT_UNK14050 0x00014050
-
-#define VIVS_BLT_UNK14054 0x00014054
-
-#define VIVS_BLT_UNK14058 0x00014058
-
-#define VIVS_BLT_UNK1405C 0x0001405c
-
-#define VIVS_BLT_UNK14060 0x00014060
-
-#define VIVS_BLT_UNK14064 0x00014064
-
-#define VIVS_BLT_UNK1409C 0x0001409c
-
-#define VIVS_BLT_UNK140A0 0x000140a0
-
-#define VIVS_BLT_FENCE_OUT_ADDRESS 0x000140a4
-
-#define VIVS_BLT_FENCE_OUT_DATA_LOW 0x000140a8
-
-#define VIVS_BLT_UNK140AC 0x000140ac
-
-#define VIVS_BLT_FENCE_OUT_DATA_HIGH 0x000140b4
-
-#define VIVS_BLT_ENABLE 0x000140b8
-#define VIVS_BLT_ENABLE_ENABLE 0x00000001
-
-#define VIVS_BLT_UNK140BC 0x000140bc
+#define VIVS_NFE_GENERIC_ATTRIB(i0) (0x00000000 + 0x4*(i0))
+#define VIVS_NFE_GENERIC_ATTRIB__ESIZE 0x00000004
+#define VIVS_NFE_GENERIC_ATTRIB__LEN 0x00000020
+
+#define VIVS_NFE_GENERIC_ATTRIB_CONFIG0(i0) (0x00017800 + 0x4*(i0))
+#define VIVS_NFE_GENERIC_ATTRIB_CONFIG0_TYPE__MASK 0x0000000f
+#define VIVS_NFE_GENERIC_ATTRIB_CONFIG0_TYPE__SHIFT 0
+#define VIVS_NFE_GENERIC_ATTRIB_CONFIG0_TYPE(x) (((x) << VIVS_NFE_GENERIC_ATTRIB_CONFIG0_TYPE__SHIFT) & VIVS_NFE_GENERIC_ATTRIB_CONFIG0_TYPE__MASK)
+#define VIVS_NFE_GENERIC_ATTRIB_CONFIG0_ENDIAN__MASK 0x00000030
+#define VIVS_NFE_GENERIC_ATTRIB_CONFIG0_ENDIAN__SHIFT 4
+#define VIVS_NFE_GENERIC_ATTRIB_CONFIG0_ENDIAN(x) (((x) << VIVS_NFE_GENERIC_ATTRIB_CONFIG0_ENDIAN__SHIFT) & VIVS_NFE_GENERIC_ATTRIB_CONFIG0_ENDIAN__MASK)
+#define VIVS_NFE_GENERIC_ATTRIB_CONFIG0_STREAM__MASK 0x00000700
+#define VIVS_NFE_GENERIC_ATTRIB_CONFIG0_STREAM__SHIFT 8
+#define VIVS_NFE_GENERIC_ATTRIB_CONFIG0_STREAM(x) (((x) << VIVS_NFE_GENERIC_ATTRIB_CONFIG0_STREAM__SHIFT) & VIVS_NFE_GENERIC_ATTRIB_CONFIG0_STREAM__MASK)
+#define VIVS_NFE_GENERIC_ATTRIB_CONFIG0_NUM__MASK 0x00003000
+#define VIVS_NFE_GENERIC_ATTRIB_CONFIG0_NUM__SHIFT 12
+#define VIVS_NFE_GENERIC_ATTRIB_CONFIG0_NUM(x) (((x) << VIVS_NFE_GENERIC_ATTRIB_CONFIG0_NUM__SHIFT) & VIVS_NFE_GENERIC_ATTRIB_CONFIG0_NUM__MASK)
+#define VIVS_NFE_GENERIC_ATTRIB_CONFIG0_NORMALIZE__MASK 0x0000c000
+#define VIVS_NFE_GENERIC_ATTRIB_CONFIG0_NORMALIZE__SHIFT 14
+#define VIVS_NFE_GENERIC_ATTRIB_CONFIG0_NORMALIZE_OFF 0x00000000
+#define VIVS_NFE_GENERIC_ATTRIB_CONFIG0_NORMALIZE_ON 0x00008000
+#define VIVS_NFE_GENERIC_ATTRIB_CONFIG0_START__MASK 0x00ff0000
+#define VIVS_NFE_GENERIC_ATTRIB_CONFIG0_START__SHIFT 16
+#define VIVS_NFE_GENERIC_ATTRIB_CONFIG0_START(x) (((x) << VIVS_NFE_GENERIC_ATTRIB_CONFIG0_START__SHIFT) & VIVS_NFE_GENERIC_ATTRIB_CONFIG0_START__MASK)
+
+#define VIVS_NFE_GENERIC_ATTRIB_UNK17880(i0) (0x00017880 + 0x4*(i0))
+
+#define VIVS_NFE_GENERIC_ATTRIB_UNK17900(i0) (0x00017900 + 0x4*(i0))
+
+#define VIVS_NFE_GENERIC_ATTRIB_UNK17980(i0) (0x00017980 + 0x4*(i0))
+
+#define VIVS_NFE_GENERIC_ATTRIB_SCALE(i0) (0x00017a00 + 0x4*(i0))
+
+#define VIVS_NFE_GENERIC_ATTRIB_CONFIG1(i0) (0x00017a80 + 0x4*(i0))
+#define VIVS_NFE_GENERIC_ATTRIB_CONFIG1_END__MASK 0x000000ff
+#define VIVS_NFE_GENERIC_ATTRIB_CONFIG1_END__SHIFT 0
+#define VIVS_NFE_GENERIC_ATTRIB_CONFIG1_END(x) (((x) << VIVS_NFE_GENERIC_ATTRIB_CONFIG1_END__SHIFT) & VIVS_NFE_GENERIC_ATTRIB_CONFIG1_END__MASK)
+#define VIVS_NFE_GENERIC_ATTRIB_CONFIG1_NONCONSECUTIVE 0x00000800
#define VIVS_DUMMY 0x00000000
diff --git a/src/gallium/drivers/etnaviv/hw/state_3d.xml.h b/src/gallium/drivers/etnaviv/hw/state_3d.xml.h
index 9084e643d3c..c5722aafa1b 100644
--- a/src/gallium/drivers/etnaviv/hw/state_3d.xml.h
+++ b/src/gallium/drivers/etnaviv/hw/state_3d.xml.h
@@ -8,13 +8,15 @@ http://0x04.net/cgit/index.cgi/rules-ng-ng
git clone git://0x04.net/rules-ng-ng
The rules-ng-ng source files this header was generated from are:
-- state.xml ( 26245 bytes, from 2017-10-05 21:32:06)
-- common.xml ( 26135 bytes, from 2017-10-05 21:20:32)
-- state_hi.xml ( 27733 bytes, from 2017-10-05 21:20:32)
-- copyright.xml ( 1597 bytes, from 2016-11-13 13:46:17)
-- state_2d.xml ( 51552 bytes, from 2016-11-13 13:46:17)
-- state_3d.xml ( 80819 bytes, from 2017-10-05 21:20:32)
-- state_vg.xml ( 5975 bytes, from 2016-11-13 13:46:17)
+- state.xml ( 26087 bytes, from 2017-10-30 13:44:54)
+- common.xml ( 26187 bytes, from 2017-10-31 19:05:01)
+- common_3d.xml ( 14547 bytes, from 2017-11-01 16:08:07)
+- state_hi.xml ( 27733 bytes, from 2017-10-02 19:00:30)
+- copyright.xml ( 1597 bytes, from 2016-10-29 07:29:22)
+- state_2d.xml ( 51552 bytes, from 2016-10-29 07:29:22)
+- state_3d.xml ( 79520 bytes, from 2017-10-31 19:05:01)
+- state_blt.xml ( 13405 bytes, from 2017-10-16 17:42:46)
+- state_vg.xml ( 5975 bytes, from 2016-10-29 07:29:22)
Copyright (C) 2012-2017 by the following authors:
- Wladimir J. van der Laan <[email protected]>
@@ -87,6 +89,7 @@ DEALINGS IN THE SOFTWARE.
#define RS_FORMAT_X8R8G8B8 0x00000005
#define RS_FORMAT_A8R8G8B8 0x00000006
#define RS_FORMAT_YUY2 0x00000007
+#define RS_FORMAT_A8 0x00000010
#define RS_FORMAT_R16F 0x00000011
#define RS_FORMAT_G16R16F 0x00000012
#define RS_FORMAT_A16B16G16R16F 0x00000013
@@ -103,85 +106,6 @@ DEALINGS IN THE SOFTWARE.
#define RS_FORMAT_A2B10G10R10UI 0x0000001e
#define RS_FORMAT_G8R8 0x0000001f
#define RS_FORMAT_R8 0x00000023
-#define TEXTURE_FORMAT_NONE 0x00000000
-#define TEXTURE_FORMAT_A8 0x00000001
-#define TEXTURE_FORMAT_L8 0x00000002
-#define TEXTURE_FORMAT_I8 0x00000003
-#define TEXTURE_FORMAT_A8L8 0x00000004
-#define TEXTURE_FORMAT_A4R4G4B4 0x00000005
-#define TEXTURE_FORMAT_X4R4G4B4 0x00000006
-#define TEXTURE_FORMAT_A8R8G8B8 0x00000007
-#define TEXTURE_FORMAT_X8R8G8B8 0x00000008
-#define TEXTURE_FORMAT_A8B8G8R8 0x00000009
-#define TEXTURE_FORMAT_X8B8G8R8 0x0000000a
-#define TEXTURE_FORMAT_R5G6B5 0x0000000b
-#define TEXTURE_FORMAT_A1R5G5B5 0x0000000c
-#define TEXTURE_FORMAT_X1R5G5B5 0x0000000d
-#define TEXTURE_FORMAT_YUY2 0x0000000e
-#define TEXTURE_FORMAT_UYVY 0x0000000f
-#define TEXTURE_FORMAT_D16 0x00000010
-#define TEXTURE_FORMAT_D24S8 0x00000011
-#define TEXTURE_FORMAT_DXT1 0x00000013
-#define TEXTURE_FORMAT_DXT2_DXT3 0x00000014
-#define TEXTURE_FORMAT_DXT4_DXT5 0x00000015
-#define TEXTURE_FORMAT_E5B9G9R9 0x0000001d
-#define TEXTURE_FORMAT_ETC1 0x0000001e
-#define TEXTURE_FORMAT_EXT_NONE 0x00000000
-#define TEXTURE_FORMAT_EXT_RGB8_PUNCHTHROUGH_ALPHA1_ETC2 0x00000001
-#define TEXTURE_FORMAT_EXT_RGBA8_ETC2_EAC 0x00000002
-#define TEXTURE_FORMAT_EXT_R11_EAC 0x00000003
-#define TEXTURE_FORMAT_EXT_RG11_EAC 0x00000004
-#define TEXTURE_FORMAT_EXT_SIGNED_RG11_EAC 0x00000005
-#define TEXTURE_FORMAT_EXT_G8R8 0x00000006
-#define TEXTURE_FORMAT_EXT_R16F 0x00000007
-#define TEXTURE_FORMAT_EXT_G16R16F 0x00000008
-#define TEXTURE_FORMAT_EXT_A16B16G16R16F 0x00000009
-#define TEXTURE_FORMAT_EXT_R32F 0x0000000a
-#define TEXTURE_FORMAT_EXT_G32R32F 0x0000000b
-#define TEXTURE_FORMAT_EXT_A2B10G10R10 0x0000000c
-#define TEXTURE_FORMAT_EXT_SIGNED_R11_EAC 0x0000000d
-#define TEXTURE_FORMAT_EXT_R8_SNORM 0x0000000e
-#define TEXTURE_FORMAT_EXT_G8R8_SNORM 0x0000000f
-#define TEXTURE_FORMAT_EXT_X8B8G8R8_SNORM 0x00000010
-#define TEXTURE_FORMAT_EXT_A8B8G8R8_SNORM 0x00000011
-#define TEXTURE_FORMAT_EXT_ASTC 0x00000014
-#define TEXTURE_FORMAT_EXT_R8I 0x00000015
-#define TEXTURE_FORMAT_EXT_G8R8I 0x00000016
-#define TEXTURE_FORMAT_EXT_A8B8G8R8I 0x00000017
-#define TEXTURE_FORMAT_EXT_R16I 0x00000018
-#define TEXTURE_FORMAT_EXT_G16R16I 0x00000019
-#define TEXTURE_FORMAT_EXT_A16B16G16R16I 0x0000001a
-#define TEXTURE_FORMAT_EXT_B10G11R11F 0x0000001b
-#define TEXTURE_FORMAT_EXT_A2B10G10R10UI 0x0000001c
-#define TEXTURE_FILTER_NONE 0x00000000
-#define TEXTURE_FILTER_NEAREST 0x00000001
-#define TEXTURE_FILTER_LINEAR 0x00000002
-#define TEXTURE_FILTER_ANISOTROPIC 0x00000003
-#define TEXTURE_TYPE_NONE 0x00000000
-#define TEXTURE_TYPE_1D 0x00000001
-#define TEXTURE_TYPE_2D 0x00000002
-#define TEXTURE_TYPE_3D 0x00000003
-#define TEXTURE_TYPE_CUBE_MAP 0x00000005
-#define TEXTURE_WRAPMODE_REPEAT 0x00000000
-#define TEXTURE_WRAPMODE_MIRRORED_REPEAT 0x00000001
-#define TEXTURE_WRAPMODE_CLAMP_TO_EDGE 0x00000002
-#define TEXTURE_FACE_POS_X 0x00000000
-#define TEXTURE_FACE_NEG_X 0x00000001
-#define TEXTURE_FACE_POS_Y 0x00000002
-#define TEXTURE_FACE_NEG_Y 0x00000003
-#define TEXTURE_FACE_POS_Z 0x00000004
-#define TEXTURE_FACE_NEG_Z 0x00000005
-#define TEXTURE_SWIZZLE_RED 0x00000000
-#define TEXTURE_SWIZZLE_GREEN 0x00000001
-#define TEXTURE_SWIZZLE_BLUE 0x00000002
-#define TEXTURE_SWIZZLE_ALPHA 0x00000003
-#define TEXTURE_SWIZZLE_ZERO 0x00000004
-#define TEXTURE_SWIZZLE_ONE 0x00000005
-#define TEXTURE_HALIGN_FOUR 0x00000000
-#define TEXTURE_HALIGN_SIXTEEN 0x00000001
-#define TEXTURE_HALIGN_SUPER_TILED 0x00000002
-#define TEXTURE_HALIGN_SPLIT_TILED 0x00000003
-#define TEXTURE_HALIGN_SPLIT_SUPER_TILED 0x00000004
#define LOGIC_OP_CLEAR 0x00000000
#define LOGIC_OP_NOR 0x00000001
#define LOGIC_OP_AND_INVERTED 0x00000002
@@ -198,6 +122,30 @@ DEALINGS IN THE SOFTWARE.
#define LOGIC_OP_OR_REVERSE 0x0000000d
#define LOGIC_OP_OR 0x0000000e
#define LOGIC_OP_SET 0x0000000f
+#define VARYING_NUM_COMPONENTS_VAR0__MASK 0x00000007
+#define VARYING_NUM_COMPONENTS_VAR0__SHIFT 0
+#define VARYING_NUM_COMPONENTS_VAR0(x) (((x) << VARYING_NUM_COMPONENTS_VAR0__SHIFT) & VARYING_NUM_COMPONENTS_VAR0__MASK)
+#define VARYING_NUM_COMPONENTS_VAR1__MASK 0x00000070
+#define VARYING_NUM_COMPONENTS_VAR1__SHIFT 4
+#define VARYING_NUM_COMPONENTS_VAR1(x) (((x) << VARYING_NUM_COMPONENTS_VAR1__SHIFT) & VARYING_NUM_COMPONENTS_VAR1__MASK)
+#define VARYING_NUM_COMPONENTS_VAR2__MASK 0x00000700
+#define VARYING_NUM_COMPONENTS_VAR2__SHIFT 8
+#define VARYING_NUM_COMPONENTS_VAR2(x) (((x) << VARYING_NUM_COMPONENTS_VAR2__SHIFT) & VARYING_NUM_COMPONENTS_VAR2__MASK)
+#define VARYING_NUM_COMPONENTS_VAR3__MASK 0x00007000
+#define VARYING_NUM_COMPONENTS_VAR3__SHIFT 12
+#define VARYING_NUM_COMPONENTS_VAR3(x) (((x) << VARYING_NUM_COMPONENTS_VAR3__SHIFT) & VARYING_NUM_COMPONENTS_VAR3__MASK)
+#define VARYING_NUM_COMPONENTS_VAR4__MASK 0x00070000
+#define VARYING_NUM_COMPONENTS_VAR4__SHIFT 16
+#define VARYING_NUM_COMPONENTS_VAR4(x) (((x) << VARYING_NUM_COMPONENTS_VAR4__SHIFT) & VARYING_NUM_COMPONENTS_VAR4__MASK)
+#define VARYING_NUM_COMPONENTS_VAR5__MASK 0x00700000
+#define VARYING_NUM_COMPONENTS_VAR5__SHIFT 20
+#define VARYING_NUM_COMPONENTS_VAR5(x) (((x) << VARYING_NUM_COMPONENTS_VAR5__SHIFT) & VARYING_NUM_COMPONENTS_VAR5__MASK)
+#define VARYING_NUM_COMPONENTS_VAR6__MASK 0x07000000
+#define VARYING_NUM_COMPONENTS_VAR6__SHIFT 24
+#define VARYING_NUM_COMPONENTS_VAR6(x) (((x) << VARYING_NUM_COMPONENTS_VAR6__SHIFT) & VARYING_NUM_COMPONENTS_VAR6__MASK)
+#define VARYING_NUM_COMPONENTS_VAR7__MASK 0x70000000
+#define VARYING_NUM_COMPONENTS_VAR7__SHIFT 28
+#define VARYING_NUM_COMPONENTS_VAR7(x) (((x) << VARYING_NUM_COMPONENTS_VAR7__SHIFT) & VARYING_NUM_COMPONENTS_VAR7__MASK)
#define VIVS_VS 0x00000000
#define VIVS_VS_END_PC 0x00000800
@@ -284,7 +232,7 @@ DEALINGS IN THE SOFTWARE.
#define VIVS_VS_UNIFORM_CACHE 0x00000860
#define VIVS_VS_UNIFORM_CACHE_FLUSH 0x00000001
#define VIVS_VS_UNIFORM_CACHE_PS 0x00000010
-#define VIVS_VS_UNIFORM_CACHE_UNK12 0x00001000
+#define VIVS_VS_UNIFORM_CACHE_RTNE_ROUNDING 0x00001000
#define VIVS_VS_UNIFORM_BASE 0x00000864
@@ -295,19 +243,23 @@ DEALINGS IN THE SOFTWARE.
#define VIVS_VS_INST_ADDR 0x0000086c
-#define VIVS_VS_HALTI5_UNK00870 0x00000870
+#define VIVS_VS_HALTI5_OUTPUT_COUNT 0x00000870
+#define VIVS_VS_HALTI5_OUTPUT_COUNT_COUNT__MASK 0x000003ff
+#define VIVS_VS_HALTI5_OUTPUT_COUNT_COUNT__SHIFT 0
+#define VIVS_VS_HALTI5_OUTPUT_COUNT_COUNT(x) (((x) << VIVS_VS_HALTI5_OUTPUT_COUNT_COUNT__SHIFT) & VIVS_VS_HALTI5_OUTPUT_COUNT_COUNT__MASK)
+#define VIVS_VS_HALTI5_OUTPUT_COUNT_B__MASK 0x0007ff00
+#define VIVS_VS_HALTI5_OUTPUT_COUNT_B__SHIFT 8
+#define VIVS_VS_HALTI5_OUTPUT_COUNT_B(x) (((x) << VIVS_VS_HALTI5_OUTPUT_COUNT_B__SHIFT) & VIVS_VS_HALTI5_OUTPUT_COUNT_B__MASK)
-#define VIVS_VS_HALTI5_UNK00874 0x00000874
+#define VIVS_VS_NEWRANGE_LOW 0x00000874
#define VIVS_VS_HALTI5_UNK00878 0x00000878
-#define VIVS_VS_HALTI5_UNK0087C 0x0000087c
-
#define VIVS_VS_HALTI5_UNK00880 0x00000880
#define VIVS_VS_HALTI1_UNK00884 0x00000884
-#define VIVS_VS_UNK0088C 0x0000088c
+#define VIVS_VS_ICACHE_PREFETCH 0x0000088c
#define VIVS_VS_ICACHE_UNK00890 0x00000890
@@ -316,8 +268,17 @@ DEALINGS IN THE SOFTWARE.
#define VIVS_VS_HALTI5_UNK00898__LEN 0x00000002
#define VIVS_VS_HALTI5_UNK008A0 0x000008a0
-
-#define VIVS_VS_HALTI5_UNK008A8 0x000008a8
+#define VIVS_VS_HALTI5_UNK008A0_A__MASK 0x0000003f
+#define VIVS_VS_HALTI5_UNK008A0_A__SHIFT 0
+#define VIVS_VS_HALTI5_UNK008A0_A(x) (((x) << VIVS_VS_HALTI5_UNK008A0_A__SHIFT) & VIVS_VS_HALTI5_UNK008A0_A__MASK)
+#define VIVS_VS_HALTI5_UNK008A0_B__MASK 0x0007f000
+#define VIVS_VS_HALTI5_UNK008A0_B__SHIFT 12
+#define VIVS_VS_HALTI5_UNK008A0_B(x) (((x) << VIVS_VS_HALTI5_UNK008A0_B__SHIFT) & VIVS_VS_HALTI5_UNK008A0_B__MASK)
+#define VIVS_VS_HALTI5_UNK008A0_C__MASK 0x1ff00000
+#define VIVS_VS_HALTI5_UNK008A0_C__SHIFT 20
+#define VIVS_VS_HALTI5_UNK008A0_C(x) (((x) << VIVS_VS_HALTI5_UNK008A0_C__SHIFT) & VIVS_VS_HALTI5_UNK008A0_C__MASK)
+
+#define VIVS_VS_SAMPLER_BASE 0x000008a8
#define VIVS_VS_ICACHE_INVALIDATE 0x000008b0
#define VIVS_VS_ICACHE_INVALIDATE_UNK0 0x00000001
@@ -328,15 +289,39 @@ DEALINGS IN THE SOFTWARE.
#define VIVS_VS_HALTI5_UNK008B8 0x000008b8
-#define VIVS_VS_HALTI5_UNK008BC 0x000008bc
-
-#define VIVS_VS_HALTI5_UNK008C0(i0) (0x000008c0 + 0x4*(i0))
-#define VIVS_VS_HALTI5_UNK008C0__ESIZE 0x00000004
-#define VIVS_VS_HALTI5_UNK008C0__LEN 0x00000008
-
-#define VIVS_VS_HALTI5_UNK008E0(i0) (0x000008e0 + 0x4*(i0))
-#define VIVS_VS_HALTI5_UNK008E0__ESIZE 0x00000004
-#define VIVS_VS_HALTI5_UNK008E0__LEN 0x00000008
+#define VIVS_VS_NEWRANGE_HIGH 0x000008bc
+
+#define VIVS_VS_HALTI5_INPUT(i0) (0x000008c0 + 0x4*(i0))
+#define VIVS_VS_HALTI5_INPUT__ESIZE 0x00000004
+#define VIVS_VS_HALTI5_INPUT__LEN 0x00000008
+#define VIVS_VS_HALTI5_INPUT_I0__MASK 0x000000ff
+#define VIVS_VS_HALTI5_INPUT_I0__SHIFT 0
+#define VIVS_VS_HALTI5_INPUT_I0(x) (((x) << VIVS_VS_HALTI5_INPUT_I0__SHIFT) & VIVS_VS_HALTI5_INPUT_I0__MASK)
+#define VIVS_VS_HALTI5_INPUT_I1__MASK 0x0000ff00
+#define VIVS_VS_HALTI5_INPUT_I1__SHIFT 8
+#define VIVS_VS_HALTI5_INPUT_I1(x) (((x) << VIVS_VS_HALTI5_INPUT_I1__SHIFT) & VIVS_VS_HALTI5_INPUT_I1__MASK)
+#define VIVS_VS_HALTI5_INPUT_I2__MASK 0x00ff0000
+#define VIVS_VS_HALTI5_INPUT_I2__SHIFT 16
+#define VIVS_VS_HALTI5_INPUT_I2(x) (((x) << VIVS_VS_HALTI5_INPUT_I2__SHIFT) & VIVS_VS_HALTI5_INPUT_I2__MASK)
+#define VIVS_VS_HALTI5_INPUT_I3__MASK 0xff000000
+#define VIVS_VS_HALTI5_INPUT_I3__SHIFT 24
+#define VIVS_VS_HALTI5_INPUT_I3(x) (((x) << VIVS_VS_HALTI5_INPUT_I3__SHIFT) & VIVS_VS_HALTI5_INPUT_I3__MASK)
+
+#define VIVS_VS_HALTI5_OUTPUT(i0) (0x000008e0 + 0x4*(i0))
+#define VIVS_VS_HALTI5_OUTPUT__ESIZE 0x00000004
+#define VIVS_VS_HALTI5_OUTPUT__LEN 0x00000008
+#define VIVS_VS_HALTI5_OUTPUT_O0__MASK 0x000000ff
+#define VIVS_VS_HALTI5_OUTPUT_O0__SHIFT 0
+#define VIVS_VS_HALTI5_OUTPUT_O0(x) (((x) << VIVS_VS_HALTI5_OUTPUT_O0__SHIFT) & VIVS_VS_HALTI5_OUTPUT_O0__MASK)
+#define VIVS_VS_HALTI5_OUTPUT_O1__MASK 0x0000ff00
+#define VIVS_VS_HALTI5_OUTPUT_O1__SHIFT 8
+#define VIVS_VS_HALTI5_OUTPUT_O1(x) (((x) << VIVS_VS_HALTI5_OUTPUT_O1__SHIFT) & VIVS_VS_HALTI5_OUTPUT_O1__MASK)
+#define VIVS_VS_HALTI5_OUTPUT_O2__MASK 0x00ff0000
+#define VIVS_VS_HALTI5_OUTPUT_O2__SHIFT 16
+#define VIVS_VS_HALTI5_OUTPUT_O2(x) (((x) << VIVS_VS_HALTI5_OUTPUT_O2__SHIFT) & VIVS_VS_HALTI5_OUTPUT_O2__MASK)
+#define VIVS_VS_HALTI5_OUTPUT_O3__MASK 0xff000000
+#define VIVS_VS_HALTI5_OUTPUT_O3__SHIFT 24
+#define VIVS_VS_HALTI5_OUTPUT_O3(x) (((x) << VIVS_VS_HALTI5_OUTPUT_O3__SHIFT) & VIVS_VS_HALTI5_OUTPUT_O3__MASK)
#define VIVS_VS_INST_MEM(i0) (0x00004000 + 0x4*(i0))
#define VIVS_VS_INST_MEM__ESIZE 0x00000004
@@ -346,9 +331,7 @@ DEALINGS IN THE SOFTWARE.
#define VIVS_VS_UNIFORMS__ESIZE 0x00000004
#define VIVS_VS_UNIFORMS__LEN 0x00000400
-#define VIVS_VS_HALTI5_UNK15600 0x00015600
-
-#define VIVS_VS_HALTI5_UNK15604 0x00015604
+#define VIVS_VS_ICACHE_COUNT 0x00015604
#define VIVS_CL 0x00000000
@@ -531,11 +514,11 @@ DEALINGS IN THE SOFTWARE.
#define VIVS_PA_ZFARCLIPPING 0x00000a8c
-#define VIVS_PA_HALTI5_UNK00A90(i0) (0x00000a90 + 0x4*(i0))
-#define VIVS_PA_HALTI5_UNK00A90__ESIZE 0x00000004
-#define VIVS_PA_HALTI5_UNK00A90__LEN 0x00000004
+#define VIVS_PA_VARYING_NUM_COMPONENTS(i0) (0x00000a90 + 0x4*(i0))
+#define VIVS_PA_VARYING_NUM_COMPONENTS__ESIZE 0x00000004
+#define VIVS_PA_VARYING_NUM_COMPONENTS__LEN 0x00000004
-#define VIVS_PA_HALTI5_UNK00AA8 0x00000aa8
+#define VIVS_PA_VS_OUTPUT_COUNT 0x00000aa8
#define VIVS_SE 0x00000000
@@ -603,6 +586,7 @@ DEALINGS IN THE SOFTWARE.
#define VIVS_PS_INPUT_COUNT_UNK8__MASK 0x00001f00
#define VIVS_PS_INPUT_COUNT_UNK8__SHIFT 8
#define VIVS_PS_INPUT_COUNT_UNK8(x) (((x) << VIVS_PS_INPUT_COUNT_UNK8__SHIFT) & VIVS_PS_INPUT_COUNT_UNK8__MASK)
+#define VIVS_PS_INPUT_COUNT_DUAL16 0x00010000
#define VIVS_PS_TEMP_REGISTER_CONTROL 0x0000100c
#define VIVS_PS_TEMP_REGISTER_CONTROL_NUM_TEMPS__MASK 0x0000003f
@@ -646,21 +630,23 @@ DEALINGS IN THE SOFTWARE.
#define VIVS_PS_UNK01040__ESIZE 0x00000004
#define VIVS_PS_UNK01040__LEN 0x00000002
-#define VIVS_PS_UNK01048 0x00001048
+#define VIVS_PS_ICACHE_PREFETCH 0x00001048
#define VIVS_PS_ICACHE_UNK0104C 0x0000104c
-#define VIVS_PS_HALTI4_UNK01054 0x00001054
+#define VIVS_PS_MSAA_CONFIG 0x00001054
+
+#define VIVS_PS_SAMPLER_BASE 0x00001058
-#define VIVS_PS_HALTI5_UNK01058 0x00001058
+#define VIVS_PS_VARYING_NUM_COMPONENTS(i0) (0x00001080 + 0x4*(i0))
+#define VIVS_PS_VARYING_NUM_COMPONENTS__ESIZE 0x00000004
+#define VIVS_PS_VARYING_NUM_COMPONENTS__LEN 0x00000004
-#define VIVS_PS_HALTI5_UNK01080(i0) (0x00001080 + 0x4*(i0))
-#define VIVS_PS_HALTI5_UNK01080__ESIZE 0x00000004
-#define VIVS_PS_HALTI5_UNK01080__LEN 0x00000004
+#define VIVS_PS_NEWRANGE_LOW 0x0000087c
-#define VIVS_PS_HALTI5_UNK01090 0x00001090
+#define VIVS_PS_NEWRANGE_HIGH 0x00001090
-#define VIVS_PS_HALTI5_UNK01094 0x00001094
+#define VIVS_PS_ICACHE_COUNT 0x00001094
#define VIVS_PS_HALTI5_UNK01098 0x00001098
@@ -686,6 +672,8 @@ DEALINGS IN THE SOFTWARE.
#define VIVS_GS_UNK01114 0x00001114
+#define VIVS_GS_ICACHE_PREFETCH 0x00001118
+
#define VIVS_GS_UNK0111C 0x0000111c
#define VIVS_GS_UNK01120(i0) (0x00001120 + 0x4*(i0))
@@ -712,6 +700,8 @@ DEALINGS IN THE SOFTWARE.
#define VIVS_TCS_UNK14A08 0x00014a08
+#define VIVS_TCS_ICACHE_PREFETCH 0x00014a0c
+
#define VIVS_TCS_UNK14A10 0x00014a10
#define VIVS_TCS_UNK14A14 0x00014a14
@@ -740,6 +730,8 @@ DEALINGS IN THE SOFTWARE.
#define VIVS_TES_UNK14B0C 0x00014b0c
+#define VIVS_TES_ICACHE_PREFETCH 0x00014b10
+
#define VIVS_TES_UNK14B14 0x00014b14
#define VIVS_TES_UNK14B18 0x00014b18
@@ -947,6 +939,7 @@ DEALINGS IN THE SOFTWARE.
#define VIVS_PE_COLOR_FORMAT_COMPONENTS__MASK 0x00000f00
#define VIVS_PE_COLOR_FORMAT_COMPONENTS__SHIFT 8
#define VIVS_PE_COLOR_FORMAT_COMPONENTS(x) (((x) << VIVS_PE_COLOR_FORMAT_COMPONENTS__SHIFT) & VIVS_PE_COLOR_FORMAT_COMPONENTS__MASK)
+#define VIVS_PE_COLOR_FORMAT_SUPER_TILED_NEW 0x00002000
#define VIVS_PE_COLOR_FORMAT_COMPONENTS_MASK 0x00001000
#define VIVS_PE_COLOR_FORMAT_OVERWRITE 0x00010000
#define VIVS_PE_COLOR_FORMAT_OVERWRITE_MASK 0x00020000
@@ -1046,7 +1039,13 @@ DEALINGS IN THE SOFTWARE.
#define VIVS_PE_STENCIL_CONFIG_EXT2_WRITE_MASK_BACK__SHIFT 8
#define VIVS_PE_STENCIL_CONFIG_EXT2_WRITE_MASK_BACK(x) (((x) << VIVS_PE_STENCIL_CONFIG_EXT2_WRITE_MASK_BACK__SHIFT) & VIVS_PE_STENCIL_CONFIG_EXT2_WRITE_MASK_BACK__MASK)
-#define VIVS_PE_HALTI3_UNK014BC 0x000014bc
+#define VIVS_PE_MEM_CONFIG 0x000014bc
+#define VIVS_PE_MEM_CONFIG_COLOR_CACHE_MODE__MASK 0x01000000
+#define VIVS_PE_MEM_CONFIG_COLOR_CACHE_MODE__SHIFT 24
+#define VIVS_PE_MEM_CONFIG_COLOR_CACHE_MODE(x) (((x) << VIVS_PE_MEM_CONFIG_COLOR_CACHE_MODE__SHIFT) & VIVS_PE_MEM_CONFIG_COLOR_CACHE_MODE__MASK)
+#define VIVS_PE_MEM_CONFIG_DEPTH_CACHE_MODE__MASK 0x04000000
+#define VIVS_PE_MEM_CONFIG_DEPTH_CACHE_MODE__SHIFT 26
+#define VIVS_PE_MEM_CONFIG_DEPTH_CACHE_MODE(x) (((x) << VIVS_PE_MEM_CONFIG_DEPTH_CACHE_MODE__SHIFT) & VIVS_PE_MEM_CONFIG_DEPTH_CACHE_MODE__MASK)
#define VIVS_PE_HALTI4_UNK014C0 0x000014c0
@@ -1270,14 +1269,10 @@ DEALINGS IN THE SOFTWARE.
#define VIVS_TS_MEM_CONFIG_DEPTH_AUTO_DISABLE 0x00000010
#define VIVS_TS_MEM_CONFIG_COLOR_AUTO_DISABLE 0x00000020
#define VIVS_TS_MEM_CONFIG_DEPTH_COMPRESSION 0x00000040
-#define VIVS_TS_MEM_CONFIG_MSAA 0x00000080
-#define VIVS_TS_MEM_CONFIG_MSAA_FORMAT__MASK 0x00000f00
-#define VIVS_TS_MEM_CONFIG_MSAA_FORMAT__SHIFT 8
-#define VIVS_TS_MEM_CONFIG_MSAA_FORMAT_A4R4G4B4 0x00000000
-#define VIVS_TS_MEM_CONFIG_MSAA_FORMAT_A1R5G5B5 0x00000100
-#define VIVS_TS_MEM_CONFIG_MSAA_FORMAT_R5G6B5 0x00000200
-#define VIVS_TS_MEM_CONFIG_MSAA_FORMAT_A8R8G8B8 0x00000300
-#define VIVS_TS_MEM_CONFIG_MSAA_FORMAT_X8R8G8B8 0x00000400
+#define VIVS_TS_MEM_CONFIG_COLOR_COMPRESSION 0x00000080
+#define VIVS_TS_MEM_CONFIG_COLOR_COMPRESSION_FORMAT__MASK 0x00000f00
+#define VIVS_TS_MEM_CONFIG_COLOR_COMPRESSION_FORMAT__SHIFT 8
+#define VIVS_TS_MEM_CONFIG_COLOR_COMPRESSION_FORMAT(x) (((x) << VIVS_TS_MEM_CONFIG_COLOR_COMPRESSION_FORMAT__SHIFT) & VIVS_TS_MEM_CONFIG_COLOR_COMPRESSION_FORMAT__MASK)
#define VIVS_TS_MEM_CONFIG_UNK12 0x00001000
#define VIVS_TS_MEM_CONFIG_HDEPTH_AUTO_DISABLE 0x00002000
#define VIVS_TS_MEM_CONFIG_UNK14 0x00004000
@@ -1419,6 +1414,7 @@ DEALINGS IN THE SOFTWARE.
#define VIVS_TE_SAMPLER_LOG_SIZE_HEIGHT__MASK 0x000ffc00
#define VIVS_TE_SAMPLER_LOG_SIZE_HEIGHT__SHIFT 10
#define VIVS_TE_SAMPLER_LOG_SIZE_HEIGHT(x) (((x) << VIVS_TE_SAMPLER_LOG_SIZE_HEIGHT__SHIFT) & VIVS_TE_SAMPLER_LOG_SIZE_HEIGHT__MASK)
+#define VIVS_TE_SAMPLER_LOG_SIZE_ASTC 0x10000000
#define VIVS_TE_SAMPLER_LOG_SIZE_RGB 0x20000000
#define VIVS_TE_SAMPLER_LOG_SIZE_SRGB 0x80000000
@@ -1450,7 +1446,7 @@ DEALINGS IN THE SOFTWARE.
#define VIVS_TE_SAMPLER_3D_CONFIG_WRAP(x) (((x) << VIVS_TE_SAMPLER_3D_CONFIG_WRAP__SHIFT) & VIVS_TE_SAMPLER_3D_CONFIG_WRAP__MASK)
#define VIVS_TE_SAMPLER_CONFIG1(i0) (0x000021c0 + 0x4*(i0))
-#define VIVS_TE_SAMPLER_CONFIG1_FORMAT_EXT__MASK 0x0000001f
+#define VIVS_TE_SAMPLER_CONFIG1_FORMAT_EXT__MASK 0x0000003f
#define VIVS_TE_SAMPLER_CONFIG1_FORMAT_EXT__SHIFT 0
#define VIVS_TE_SAMPLER_CONFIG1_FORMAT_EXT(x) (((x) << VIVS_TE_SAMPLER_CONFIG1_FORMAT_EXT__SHIFT) & VIVS_TE_SAMPLER_CONFIG1_FORMAT_EXT__MASK)
#define VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_R__MASK 0x00000700
@@ -1465,6 +1461,9 @@ DEALINGS IN THE SOFTWARE.
#define VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_A__MASK 0x00700000
#define VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_A__SHIFT 20
#define VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_A(x) (((x) << VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_A__SHIFT) & VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_A__MASK)
+#define VIVS_TE_SAMPLER_CONFIG1_CACHE_MODE__MASK 0x00800000
+#define VIVS_TE_SAMPLER_CONFIG1_CACHE_MODE__SHIFT 23
+#define VIVS_TE_SAMPLER_CONFIG1_CACHE_MODE(x) (((x) << VIVS_TE_SAMPLER_CONFIG1_CACHE_MODE__SHIFT) & VIVS_TE_SAMPLER_CONFIG1_CACHE_MODE__MASK)
#define VIVS_TE_SAMPLER_CONFIG1_TEXTURE_ARRAY 0x01000000
#define VIVS_TE_SAMPLER_CONFIG1_UNK25 0x02000000
#define VIVS_TE_SAMPLER_CONFIG1_HALIGN__MASK 0x1c000000
@@ -1534,6 +1533,7 @@ DEALINGS IN THE SOFTWARE.
#define VIVS_NTE_SAMPLER_LOG_SIZE_HEIGHT__MASK 0x000ffc00
#define VIVS_NTE_SAMPLER_LOG_SIZE_HEIGHT__SHIFT 10
#define VIVS_NTE_SAMPLER_LOG_SIZE_HEIGHT(x) (((x) << VIVS_NTE_SAMPLER_LOG_SIZE_HEIGHT__SHIFT) & VIVS_NTE_SAMPLER_LOG_SIZE_HEIGHT__MASK)
+#define VIVS_NTE_SAMPLER_LOG_SIZE_ASTC 0x10000000
#define VIVS_NTE_SAMPLER_LOG_SIZE_RGB 0x20000000
#define VIVS_NTE_SAMPLER_LOG_SIZE_SRGB 0x80000000
@@ -1553,10 +1553,19 @@ DEALINGS IN THE SOFTWARE.
#define VIVS_NTE_SAMPLER_UNK10280(i0) (0x00010280 + 0x4*(i0))
-#define VIVS_NTE_SAMPLER_UNK10300(i0) (0x00010300 + 0x4*(i0))
+#define VIVS_NTE_SAMPLER_3D_CONFIG(i0) (0x00010300 + 0x4*(i0))
+#define VIVS_NTE_SAMPLER_3D_CONFIG_DEPTH__MASK 0x00003fff
+#define VIVS_NTE_SAMPLER_3D_CONFIG_DEPTH__SHIFT 0
+#define VIVS_NTE_SAMPLER_3D_CONFIG_DEPTH(x) (((x) << VIVS_NTE_SAMPLER_3D_CONFIG_DEPTH__SHIFT) & VIVS_NTE_SAMPLER_3D_CONFIG_DEPTH__MASK)
+#define VIVS_NTE_SAMPLER_3D_CONFIG_LOG_DEPTH__MASK 0x03ff0000
+#define VIVS_NTE_SAMPLER_3D_CONFIG_LOG_DEPTH__SHIFT 16
+#define VIVS_NTE_SAMPLER_3D_CONFIG_LOG_DEPTH(x) (((x) << VIVS_NTE_SAMPLER_3D_CONFIG_LOG_DEPTH__SHIFT) & VIVS_NTE_SAMPLER_3D_CONFIG_LOG_DEPTH__MASK)
+#define VIVS_NTE_SAMPLER_3D_CONFIG_WRAP__MASK 0x30000000
+#define VIVS_NTE_SAMPLER_3D_CONFIG_WRAP__SHIFT 28
+#define VIVS_NTE_SAMPLER_3D_CONFIG_WRAP(x) (((x) << VIVS_NTE_SAMPLER_3D_CONFIG_WRAP__SHIFT) & VIVS_NTE_SAMPLER_3D_CONFIG_WRAP__MASK)
#define VIVS_NTE_SAMPLER_CONFIG1(i0) (0x00010380 + 0x4*(i0))
-#define VIVS_NTE_SAMPLER_CONFIG1_FORMAT_EXT__MASK 0x0000001f
+#define VIVS_NTE_SAMPLER_CONFIG1_FORMAT_EXT__MASK 0x0000003f
#define VIVS_NTE_SAMPLER_CONFIG1_FORMAT_EXT__SHIFT 0
#define VIVS_NTE_SAMPLER_CONFIG1_FORMAT_EXT(x) (((x) << VIVS_NTE_SAMPLER_CONFIG1_FORMAT_EXT__SHIFT) & VIVS_NTE_SAMPLER_CONFIG1_FORMAT_EXT__MASK)
#define VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_R__MASK 0x00000700
@@ -1571,6 +1580,9 @@ DEALINGS IN THE SOFTWARE.
#define VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_A__MASK 0x00700000
#define VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_A__SHIFT 20
#define VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_A(x) (((x) << VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_A__SHIFT) & VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_A__MASK)
+#define VIVS_NTE_SAMPLER_CONFIG1_CACHE_MODE__MASK 0x00800000
+#define VIVS_NTE_SAMPLER_CONFIG1_CACHE_MODE__SHIFT 23
+#define VIVS_NTE_SAMPLER_CONFIG1_CACHE_MODE(x) (((x) << VIVS_NTE_SAMPLER_CONFIG1_CACHE_MODE__SHIFT) & VIVS_NTE_SAMPLER_CONFIG1_CACHE_MODE__MASK)
#define VIVS_NTE_SAMPLER_CONFIG1_TEXTURE_ARRAY 0x01000000
#define VIVS_NTE_SAMPLER_CONFIG1_UNK25 0x02000000
#define VIVS_NTE_SAMPLER_CONFIG1_HALIGN__MASK 0x1c000000
@@ -1581,15 +1593,34 @@ DEALINGS IN THE SOFTWARE.
#define VIVS_NTE_SAMPLER_UNK10480(i0) (0x00010480 + 0x4*(i0))
-#define VIVS_NTE_SAMPLER_ASTC_UNK10500(i0) (0x00010500 + 0x4*(i0))
+#define VIVS_NTE_SAMPLER_ASTC0(i0) (0x00010500 + 0x4*(i0))
+#define VIVS_NTE_SAMPLER_ASTC0_ASTC_FORMAT__MASK 0x000000ff
+#define VIVS_NTE_SAMPLER_ASTC0_ASTC_FORMAT__SHIFT 0
+#define VIVS_NTE_SAMPLER_ASTC0_ASTC_FORMAT(x) (((x) << VIVS_NTE_SAMPLER_ASTC0_ASTC_FORMAT__SHIFT) & VIVS_NTE_SAMPLER_ASTC0_ASTC_FORMAT__MASK)
+#define VIVS_NTE_SAMPLER_ASTC0_UNK8__MASK 0x0000ff00
+#define VIVS_NTE_SAMPLER_ASTC0_UNK8__SHIFT 8
+#define VIVS_NTE_SAMPLER_ASTC0_UNK8(x) (((x) << VIVS_NTE_SAMPLER_ASTC0_UNK8__SHIFT) & VIVS_NTE_SAMPLER_ASTC0_UNK8__MASK)
+#define VIVS_NTE_SAMPLER_ASTC0_UNK16__MASK 0x00ff0000
+#define VIVS_NTE_SAMPLER_ASTC0_UNK16__SHIFT 16
+#define VIVS_NTE_SAMPLER_ASTC0_UNK16(x) (((x) << VIVS_NTE_SAMPLER_ASTC0_UNK16__SHIFT) & VIVS_NTE_SAMPLER_ASTC0_UNK16__MASK)
+#define VIVS_NTE_SAMPLER_ASTC0_UNK24__MASK 0xff000000
+#define VIVS_NTE_SAMPLER_ASTC0_UNK24__SHIFT 24
+#define VIVS_NTE_SAMPLER_ASTC0_UNK24(x) (((x) << VIVS_NTE_SAMPLER_ASTC0_UNK24__SHIFT) & VIVS_NTE_SAMPLER_ASTC0_UNK24__MASK)
-#define VIVS_NTE_SAMPLER_ASTC_UNK10580(i0) (0x00010580 + 0x4*(i0))
+#define VIVS_NTE_SAMPLER_ASTC1(i0) (0x00010580 + 0x4*(i0))
-#define VIVS_NTE_SAMPLER_ASTC_UNK10600(i0) (0x00010600 + 0x4*(i0))
+#define VIVS_NTE_SAMPLER_ASTC2(i0) (0x00010600 + 0x4*(i0))
-#define VIVS_NTE_SAMPLER_ASTC_UNK10680(i0) (0x00010600 + 0x4*(i0))
+#define VIVS_NTE_SAMPLER_ASTC3(i0) (0x00010600 + 0x4*(i0))
#define VIVS_NTE_SAMPLER_BASELOD(i0) (0x00010700 + 0x4*(i0))
+#define VIVS_NTE_SAMPLER_BASELOD_UNK23 0x00800000
+#define VIVS_NTE_SAMPLER_BASELOD_BASELOD__MASK 0x0000000f
+#define VIVS_NTE_SAMPLER_BASELOD_BASELOD__SHIFT 0
+#define VIVS_NTE_SAMPLER_BASELOD_BASELOD(x) (((x) << VIVS_NTE_SAMPLER_BASELOD_BASELOD__SHIFT) & VIVS_NTE_SAMPLER_BASELOD_BASELOD__MASK)
+#define VIVS_NTE_SAMPLER_BASELOD_MAXLOD__MASK 0x00000f00
+#define VIVS_NTE_SAMPLER_BASELOD_MAXLOD__SHIFT 8
+#define VIVS_NTE_SAMPLER_BASELOD_MAXLOD(x) (((x) << VIVS_NTE_SAMPLER_BASELOD_MAXLOD__SHIFT) & VIVS_NTE_SAMPLER_BASELOD_MAXLOD__MASK)
#define VIVS_NTE_SAMPLER_UNK10780(i0) (0x00010780 + 0x4*(i0))
@@ -1628,6 +1659,12 @@ DEALINGS IN THE SOFTWARE.
#define VIVS_NTE_HALTI3_UNK14C00__LEN 0x00000010
#define VIVS_NTE_DESCRIPTOR_UNK14C40 0x00014c40
+#define VIVS_NTE_DESCRIPTOR_UNK14C40_UNK0 0x00000001
+
+#define VIVS_NTE_DESCRIPTOR_FLUSH 0x00014c44
+#define VIVS_NTE_DESCRIPTOR_FLUSH_UNK28__MASK 0xf0000000
+#define VIVS_NTE_DESCRIPTOR_FLUSH_UNK28__SHIFT 28
+#define VIVS_NTE_DESCRIPTOR_FLUSH_UNK28(x) (((x) << VIVS_NTE_DESCRIPTOR_FLUSH_UNK28__SHIFT) & VIVS_NTE_DESCRIPTOR_FLUSH_UNK28__MASK)
#define VIVS_NTE_DESCRIPTOR_INVALIDATE 0x00014c48
#define VIVS_NTE_DESCRIPTOR_INVALIDATE_IDX__MASK 0x000001ff
@@ -1639,36 +1676,83 @@ DEALINGS IN THE SOFTWARE.
#define VIVS_NTE_DESCRIPTOR__ESIZE 0x00000004
#define VIVS_NTE_DESCRIPTOR__LEN 0x00000080
-#define VIVS_NTE_DESCRIPTOR_MIRROR_UNK15C00(i0) (0x00015800 + 0x4*(i0))
-
-#define VIVS_NTE_DESCRIPTOR_MIRROR_UNK15E00(i0) (0x00015a00 + 0x4*(i0))
-
-#define VIVS_NTE_DESCRIPTOR_UNK15C00(i0) (0x00015c00 + 0x4*(i0))
-
-#define VIVS_NTE_DESCRIPTOR_UNK15E00(i0) (0x00015e00 + 0x4*(i0))
-
-#define VIVS_NTE_DESCRIPTOR_MIRROR_UNK16C00(i0) (0x00016000 + 0x4*(i0))
-
-#define VIVS_NTE_DESCRIPTOR_MIRROR_UNK16E00(i0) (0x00016200 + 0x4*(i0))
-
-#define VIVS_NTE_DESCRIPTOR_MIRROR_UNK17000(i0) (0x00016400 + 0x4*(i0))
-
-#define VIVS_NTE_DESCRIPTOR_MIRROR_UNK17200(i0) (0x00016600 + 0x4*(i0))
-
-#define VIVS_NTE_DESCRIPTOR_MIRROR_UNK17400(i0) (0x00016800 + 0x4*(i0))
-
-#define VIVS_NTE_DESCRIPTOR_UNK16C00(i0) (0x00016c00 + 0x4*(i0))
-
-#define VIVS_NTE_DESCRIPTOR_UNK16E00(i0) (0x00016e00 + 0x4*(i0))
-
-#define VIVS_NTE_DESCRIPTOR_UNK17000(i0) (0x00017000 + 0x4*(i0))
-
-#define VIVS_NTE_DESCRIPTOR_UNK17200(i0) (0x00017200 + 0x4*(i0))
+#define VIVS_NTE_DESCRIPTOR_ADDR_MIRROR(i0) (0x00015800 + 0x4*(i0))
+
+#define VIVS_NTE_DESCRIPTOR_TX_CTRL_MIRROR(i0) (0x00015a00 + 0x4*(i0))
+
+#define VIVS_NTE_DESCRIPTOR_ADDR(i0) (0x00015c00 + 0x4*(i0))
+
+#define VIVS_NTE_DESCRIPTOR_TX_CTRL(i0) (0x00015e00 + 0x4*(i0))
+#define VIVS_NTE_DESCRIPTOR_TX_CTRL_TS_ENABLE__MASK 0x00000003
+#define VIVS_NTE_DESCRIPTOR_TX_CTRL_TS_ENABLE__SHIFT 0
+#define VIVS_NTE_DESCRIPTOR_TX_CTRL_TS_ENABLE(x) (((x) << VIVS_NTE_DESCRIPTOR_TX_CTRL_TS_ENABLE__SHIFT) & VIVS_NTE_DESCRIPTOR_TX_CTRL_TS_ENABLE__MASK)
+#define VIVS_NTE_DESCRIPTOR_TX_CTRL_TS_INDEX__MASK 0x0000001c
+#define VIVS_NTE_DESCRIPTOR_TX_CTRL_TS_INDEX__SHIFT 2
+#define VIVS_NTE_DESCRIPTOR_TX_CTRL_TS_INDEX(x) (((x) << VIVS_NTE_DESCRIPTOR_TX_CTRL_TS_INDEX__SHIFT) & VIVS_NTE_DESCRIPTOR_TX_CTRL_TS_INDEX__MASK)
+
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_MIRROR(i0) (0x00016000 + 0x4*(i0))
+
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL1_MIRROR(i0) (0x00016200 + 0x4*(i0))
+
+#define VIVS_NTE_DESCRIPTOR_SAMP_LOD_MINMAX_MIRROR(i0) (0x00016400 + 0x4*(i0))
+
+#define VIVS_NTE_DESCRIPTOR_SAMP_LOD_BIAS_MIRROR(i0) (0x00016600 + 0x4*(i0))
+
+#define VIVS_NTE_DESCRIPTOR_UNK17400_MIRROR(i0) (0x00016800 + 0x4*(i0))
+
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL0(i0) (0x00016c00 + 0x4*(i0))
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_UWRAP__MASK 0x00000007
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_UWRAP__SHIFT 0
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_UWRAP(x) (((x) << VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_UWRAP__SHIFT) & VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_UWRAP__MASK)
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_VWRAP__MASK 0x00000038
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_VWRAP__SHIFT 3
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_VWRAP(x) (((x) << VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_VWRAP__SHIFT) & VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_VWRAP__MASK)
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_WWRAP__MASK 0x000001c0
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_WWRAP__SHIFT 6
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_WWRAP(x) (((x) << VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_WWRAP__SHIFT) & VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_WWRAP__MASK)
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_MIN__MASK 0x00000600
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_MIN__SHIFT 9
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_MIN(x) (((x) << VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_MIN__SHIFT) & VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_MIN__MASK)
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_MIP__MASK 0x00001800
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_MIP__SHIFT 11
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_MIP(x) (((x) << VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_MIP__SHIFT) & VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_MIP__MASK)
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_MAG__MASK 0x00006000
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_MAG__SHIFT 13
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_MAG(x) (((x) << VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_MAG__SHIFT) & VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_MAG__MASK)
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_UNK21 0x00200000
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_UNK22 0x00400000
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL0_RGB 0x00800000
+
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL1(i0) (0x00016e00 + 0x4*(i0))
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL1_UNK1 0x00000002
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL1_SRGB 0x00000004
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL1_UNK3 0x00000008
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL1_UNK4__MASK 0x00000030
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL1_UNK4__SHIFT 4
+#define VIVS_NTE_DESCRIPTOR_SAMP_CTRL1_UNK4(x) (((x) << VIVS_NTE_DESCRIPTOR_SAMP_CTRL1_UNK4__SHIFT) & VIVS_NTE_DESCRIPTOR_SAMP_CTRL1_UNK4__MASK)
+
+#define VIVS_NTE_DESCRIPTOR_SAMP_LOD_MINMAX(i0) (0x00017000 + 0x4*(i0))
+#define VIVS_NTE_DESCRIPTOR_SAMP_LOD_MINMAX_MAX__MASK 0x0000ffff
+#define VIVS_NTE_DESCRIPTOR_SAMP_LOD_MINMAX_MAX__SHIFT 0
+#define VIVS_NTE_DESCRIPTOR_SAMP_LOD_MINMAX_MAX(x) (((x) << VIVS_NTE_DESCRIPTOR_SAMP_LOD_MINMAX_MAX__SHIFT) & VIVS_NTE_DESCRIPTOR_SAMP_LOD_MINMAX_MAX__MASK)
+#define VIVS_NTE_DESCRIPTOR_SAMP_LOD_MINMAX_MIN__MASK 0xffff0000
+#define VIVS_NTE_DESCRIPTOR_SAMP_LOD_MINMAX_MIN__SHIFT 16
+#define VIVS_NTE_DESCRIPTOR_SAMP_LOD_MINMAX_MIN(x) (((x) << VIVS_NTE_DESCRIPTOR_SAMP_LOD_MINMAX_MIN__SHIFT) & VIVS_NTE_DESCRIPTOR_SAMP_LOD_MINMAX_MIN__MASK)
+
+#define VIVS_NTE_DESCRIPTOR_SAMP_LOD_BIAS(i0) (0x00017200 + 0x4*(i0))
+#define VIVS_NTE_DESCRIPTOR_SAMP_LOD_BIAS_BIAS__MASK 0x0000ffff
+#define VIVS_NTE_DESCRIPTOR_SAMP_LOD_BIAS_BIAS__SHIFT 0
+#define VIVS_NTE_DESCRIPTOR_SAMP_LOD_BIAS_BIAS(x) (((x) << VIVS_NTE_DESCRIPTOR_SAMP_LOD_BIAS_BIAS__SHIFT) & VIVS_NTE_DESCRIPTOR_SAMP_LOD_BIAS_BIAS__MASK)
+#define VIVS_NTE_DESCRIPTOR_SAMP_LOD_BIAS_ENABLE 0x00010000
#define VIVS_NTE_DESCRIPTOR_UNK17400(i0) (0x00017400 + 0x4*(i0))
#define VIVS_SH 0x00000000
+#define VIVS_SH_CONFIG 0x00015600
+#define VIVS_SH_CONFIG_RTNE_ROUNDING 0x00000002
+#define VIVS_SH_CONFIG_DUAL16 0x00000004
+
#define VIVS_SH_UNK20000(i0) (0x00020000 + 0x4*(i0))
#define VIVS_SH_UNK20000__ESIZE 0x00000004
#define VIVS_SH_UNK20000__LEN 0x00002000
diff --git a/src/gallium/drivers/etnaviv/hw/state_blt.xml.h b/src/gallium/drivers/etnaviv/hw/state_blt.xml.h
new file mode 100644
index 00000000000..5ea439a70a1
--- /dev/null
+++ b/src/gallium/drivers/etnaviv/hw/state_blt.xml.h
@@ -0,0 +1,282 @@
+#ifndef STATE_BLT_XML
+#define STATE_BLT_XML
+
+/* Autogenerated file, DO NOT EDIT manually!
+
+This file was generated by the rules-ng-ng headergen tool in this git repository:
+http://0x04.net/cgit/index.cgi/rules-ng-ng
+git clone git://0x04.net/rules-ng-ng
+
+The rules-ng-ng source files this header was generated from are:
+- state.xml ( 26087 bytes, from 2017-10-30 13:44:54)
+- common.xml ( 26187 bytes, from 2017-10-31 19:05:01)
+- common_3d.xml ( 14547 bytes, from 2017-11-01 16:08:07)
+- state_hi.xml ( 27733 bytes, from 2017-10-02 19:00:30)
+- copyright.xml ( 1597 bytes, from 2016-10-29 07:29:22)
+- state_2d.xml ( 51552 bytes, from 2016-10-29 07:29:22)
+- state_3d.xml ( 79520 bytes, from 2017-10-31 19:05:01)
+- state_blt.xml ( 13405 bytes, from 2017-10-16 17:42:46)
+- state_vg.xml ( 5975 bytes, from 2016-10-29 07:29:22)
+
+Copyright (C) 2012-2017 by the following authors:
+- Wladimir J. van der Laan <[email protected]>
+- Christian Gmeiner <[email protected]>
+- Lucas Stach <[email protected]>
+- Russell King <[email protected]>
+
+Permission is hereby granted, free of charge, to any person obtaining a
+copy of this software and associated documentation files (the "Software"),
+to deal in the Software without restriction, including without limitation
+the rights to use, copy, modify, merge, publish, distribute, sub license,
+and/or sell copies of the Software, and to permit persons to whom the
+Software is furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice (including the
+next paragraph) shall be included in all copies or substantial portions
+of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+DEALINGS IN THE SOFTWARE.
+*/
+
+
+#define BLT_TILING_LINEAR 0x00000000
+#define BLT_TILING_SUPER_TILED 0x00000003
+#define BLT_FORMAT_A4R4G4B4 0x00000001
+#define BLT_FORMAT_X8R8G8B8 0x00000005
+#define BLT_FORMAT_A8R8G8B8 0x00000006
+#define BLT_FORMAT_A16R16G16B16 0x0000001c
+#define BLT_FORMAT_R8G8B8 0x00000022
+#define BLT_FORMAT_R8 0x00000023
+#define BLT_FORMAT_R8G8 0x00000024
+#define BLT_IMAGE_CONFIG_TS 0x00000001
+#define BLT_IMAGE_CONFIG_COMPRESSION 0x00000002
+#define BLT_IMAGE_CONFIG_COMPRESSION_FORMAT__MASK 0x000000f0
+#define BLT_IMAGE_CONFIG_COMPRESSION_FORMAT__SHIFT 4
+#define BLT_IMAGE_CONFIG_COMPRESSION_FORMAT(x) (((x) << BLT_IMAGE_CONFIG_COMPRESSION_FORMAT__SHIFT) & BLT_IMAGE_CONFIG_COMPRESSION_FORMAT__MASK)
+#define BLT_IMAGE_CONFIG_UNK8 0x00000100
+#define BLT_IMAGE_CONFIG_SWIZ_R__MASK 0x00000600
+#define BLT_IMAGE_CONFIG_SWIZ_R__SHIFT 9
+#define BLT_IMAGE_CONFIG_SWIZ_R(x) (((x) << BLT_IMAGE_CONFIG_SWIZ_R__SHIFT) & BLT_IMAGE_CONFIG_SWIZ_R__MASK)
+#define BLT_IMAGE_CONFIG_SWIZ_G__MASK 0x00001800
+#define BLT_IMAGE_CONFIG_SWIZ_G__SHIFT 11
+#define BLT_IMAGE_CONFIG_SWIZ_G(x) (((x) << BLT_IMAGE_CONFIG_SWIZ_G__SHIFT) & BLT_IMAGE_CONFIG_SWIZ_G__MASK)
+#define BLT_IMAGE_CONFIG_SWIZ_B__MASK 0x00006000
+#define BLT_IMAGE_CONFIG_SWIZ_B__SHIFT 13
+#define BLT_IMAGE_CONFIG_SWIZ_B(x) (((x) << BLT_IMAGE_CONFIG_SWIZ_B__SHIFT) & BLT_IMAGE_CONFIG_SWIZ_B__MASK)
+#define BLT_IMAGE_CONFIG_SWIZ_A__MASK 0x00018000
+#define BLT_IMAGE_CONFIG_SWIZ_A__SHIFT 15
+#define BLT_IMAGE_CONFIG_SWIZ_A(x) (((x) << BLT_IMAGE_CONFIG_SWIZ_A__SHIFT) & BLT_IMAGE_CONFIG_SWIZ_A__MASK)
+#define BLT_IMAGE_CONFIG_CACHE_MODE__MASK 0x00020000
+#define BLT_IMAGE_CONFIG_CACHE_MODE__SHIFT 17
+#define BLT_IMAGE_CONFIG_CACHE_MODE(x) (((x) << BLT_IMAGE_CONFIG_CACHE_MODE__SHIFT) & BLT_IMAGE_CONFIG_CACHE_MODE__MASK)
+#define BLT_IMAGE_CONFIG_FLIP_Y 0x00080000
+#define BLT_IMAGE_CONFIG_FROM_SUPER_TILED 0x00200000
+#define BLT_IMAGE_CONFIG_UNK22 0x00400000
+#define BLT_IMAGE_CONFIG_TO_SUPER_TILED 0x04000000
+#define VIVS_BLT 0x00000000
+
+#define VIVS_BLT_SRC_ADDR 0x00014000
+
+#define VIVS_BLT_SRC_STRIDE 0x00014008
+#define VIVS_BLT_SRC_STRIDE_STRIDE__MASK 0x000fffff
+#define VIVS_BLT_SRC_STRIDE_STRIDE__SHIFT 0
+#define VIVS_BLT_SRC_STRIDE_STRIDE(x) (((x) << VIVS_BLT_SRC_STRIDE_STRIDE__SHIFT) & VIVS_BLT_SRC_STRIDE_STRIDE__MASK)
+#define VIVS_BLT_SRC_STRIDE_FORMAT__MASK 0x1fe00000
+#define VIVS_BLT_SRC_STRIDE_FORMAT__SHIFT 21
+#define VIVS_BLT_SRC_STRIDE_FORMAT(x) (((x) << VIVS_BLT_SRC_STRIDE_FORMAT__SHIFT) & VIVS_BLT_SRC_STRIDE_FORMAT__MASK)
+#define VIVS_BLT_SRC_STRIDE_TILING__MASK 0x60000000
+#define VIVS_BLT_SRC_STRIDE_TILING__SHIFT 29
+#define VIVS_BLT_SRC_STRIDE_TILING(x) (((x) << VIVS_BLT_SRC_STRIDE_TILING__SHIFT) & VIVS_BLT_SRC_STRIDE_TILING__MASK)
+
+#define VIVS_BLT_SRC_CONFIG 0x0001400c
+
+#define VIVS_BLT_SRC_TS 0x00014010
+
+#define VIVS_BLT_SRC_POS 0x00014014
+#define VIVS_BLT_SRC_POS_X__MASK 0x0000ffff
+#define VIVS_BLT_SRC_POS_X__SHIFT 0
+#define VIVS_BLT_SRC_POS_X(x) (((x) << VIVS_BLT_SRC_POS_X__SHIFT) & VIVS_BLT_SRC_POS_X__MASK)
+#define VIVS_BLT_SRC_POS_Y__MASK 0xffff0000
+#define VIVS_BLT_SRC_POS_Y__SHIFT 16
+#define VIVS_BLT_SRC_POS_Y(x) (((x) << VIVS_BLT_SRC_POS_Y__SHIFT) & VIVS_BLT_SRC_POS_Y__MASK)
+
+#define VIVS_BLT_DEST_ADDR 0x00014018
+
+#define VIVS_BLT_DEST_TS 0x00014020
+
+#define VIVS_BLT_DEST_STRIDE 0x00014024
+#define VIVS_BLT_DEST_STRIDE_STRIDE__MASK 0x000fffff
+#define VIVS_BLT_DEST_STRIDE_STRIDE__SHIFT 0
+#define VIVS_BLT_DEST_STRIDE_STRIDE(x) (((x) << VIVS_BLT_DEST_STRIDE_STRIDE__SHIFT) & VIVS_BLT_DEST_STRIDE_STRIDE__MASK)
+#define VIVS_BLT_DEST_STRIDE_FORMAT__MASK 0x1fe00000
+#define VIVS_BLT_DEST_STRIDE_FORMAT__SHIFT 21
+#define VIVS_BLT_DEST_STRIDE_FORMAT(x) (((x) << VIVS_BLT_DEST_STRIDE_FORMAT__SHIFT) & VIVS_BLT_DEST_STRIDE_FORMAT__MASK)
+#define VIVS_BLT_DEST_STRIDE_TILING__MASK 0x60000000
+#define VIVS_BLT_DEST_STRIDE_TILING__SHIFT 29
+#define VIVS_BLT_DEST_STRIDE_TILING(x) (((x) << VIVS_BLT_DEST_STRIDE_TILING__SHIFT) & VIVS_BLT_DEST_STRIDE_TILING__MASK)
+
+#define VIVS_BLT_DEST_CONFIG 0x00014028
+
+#define VIVS_BLT_DEST_POS 0x0001402c
+#define VIVS_BLT_DEST_POS_X__MASK 0x0000ffff
+#define VIVS_BLT_DEST_POS_X__SHIFT 0
+#define VIVS_BLT_DEST_POS_X(x) (((x) << VIVS_BLT_DEST_POS_X__SHIFT) & VIVS_BLT_DEST_POS_X__MASK)
+#define VIVS_BLT_DEST_POS_Y__MASK 0xffff0000
+#define VIVS_BLT_DEST_POS_Y__SHIFT 16
+#define VIVS_BLT_DEST_POS_Y(x) (((x) << VIVS_BLT_DEST_POS_Y__SHIFT) & VIVS_BLT_DEST_POS_Y__MASK)
+
+#define VIVS_BLT_IMAGE_SIZE 0x00014030
+#define VIVS_BLT_IMAGE_SIZE_WIDTH__MASK 0x0000ffff
+#define VIVS_BLT_IMAGE_SIZE_WIDTH__SHIFT 0
+#define VIVS_BLT_IMAGE_SIZE_WIDTH(x) (((x) << VIVS_BLT_IMAGE_SIZE_WIDTH__SHIFT) & VIVS_BLT_IMAGE_SIZE_WIDTH__MASK)
+#define VIVS_BLT_IMAGE_SIZE_HEIGHT__MASK 0xffff0000
+#define VIVS_BLT_IMAGE_SIZE_HEIGHT__SHIFT 16
+#define VIVS_BLT_IMAGE_SIZE_HEIGHT(x) (((x) << VIVS_BLT_IMAGE_SIZE_HEIGHT__SHIFT) & VIVS_BLT_IMAGE_SIZE_HEIGHT__MASK)
+
+#define VIVS_BLT_SRC_TS_CLEAR_VALUE0 0x00014034
+
+#define VIVS_BLT_SRC_TS_CLEAR_VALUE1 0x00014038
+
+#define VIVS_BLT_DEST_TS_CLEAR_VALUE0 0x0001403c
+
+#define VIVS_BLT_DEST_TS_CLEAR_VALUE1 0x00014040
+
+#define VIVS_BLT_CLEAR_COLOR0 0x00014044
+
+#define VIVS_BLT_CLEAR_COLOR1 0x00014048
+
+#define VIVS_BLT_CLEAR_BITS0 0x0001404c
+
+#define VIVS_BLT_CLEAR_BITS1 0x00014050
+
+#define VIVS_BLT_BUFFER_SIZE 0x00014054
+
+#define VIVS_BLT_UNK14058 0x00014058
+
+#define VIVS_BLT_UNK1405C 0x0001405c
+
+#define VIVS_BLT_COMMAND 0x00014060
+#define VIVS_BLT_COMMAND_COMMAND__MASK 0x0000000f
+#define VIVS_BLT_COMMAND_COMMAND__SHIFT 0
+#define VIVS_BLT_COMMAND_COMMAND_CLEAR_IMAGE 0x00000001
+#define VIVS_BLT_COMMAND_COMMAND_COPY_IMAGE 0x00000002
+#define VIVS_BLT_COMMAND_COMMAND_COPY_BUFFER 0x00000003
+#define VIVS_BLT_COMMAND_COMMAND_INPLACE 0x00000004
+#define VIVS_BLT_COMMAND_COMMAND_YUV_TILE 0x00000005
+#define VIVS_BLT_COMMAND_COMMAND_GEN_MIPMAPS 0x00000006
+
+#define VIVS_BLT_CONFIG 0x00014064
+#define VIVS_BLT_CONFIG_SRC_ENDIAN__MASK 0x00000006
+#define VIVS_BLT_CONFIG_SRC_ENDIAN__SHIFT 1
+#define VIVS_BLT_CONFIG_SRC_ENDIAN(x) (((x) << VIVS_BLT_CONFIG_SRC_ENDIAN__SHIFT) & VIVS_BLT_CONFIG_SRC_ENDIAN__MASK)
+#define VIVS_BLT_CONFIG_DEST_ENDIAN__MASK 0x00000018
+#define VIVS_BLT_CONFIG_DEST_ENDIAN__SHIFT 3
+#define VIVS_BLT_CONFIG_DEST_ENDIAN(x) (((x) << VIVS_BLT_CONFIG_DEST_ENDIAN__SHIFT) & VIVS_BLT_CONFIG_DEST_ENDIAN__MASK)
+#define VIVS_BLT_CONFIG_UNK5 0x00000020
+#define VIVS_BLT_CONFIG_UNK6 0x00000040
+#define VIVS_BLT_CONFIG_CLEAR_BPP__MASK 0x00000380
+#define VIVS_BLT_CONFIG_CLEAR_BPP__SHIFT 7
+#define VIVS_BLT_CONFIG_CLEAR_BPP(x) (((x) << VIVS_BLT_CONFIG_CLEAR_BPP__SHIFT) & VIVS_BLT_CONFIG_CLEAR_BPP__MASK)
+#define VIVS_BLT_CONFIG_INPLACE_CACHE_MODE__MASK 0x00000400
+#define VIVS_BLT_CONFIG_INPLACE_CACHE_MODE__SHIFT 10
+#define VIVS_BLT_CONFIG_INPLACE_CACHE_MODE(x) (((x) << VIVS_BLT_CONFIG_INPLACE_CACHE_MODE__SHIFT) & VIVS_BLT_CONFIG_INPLACE_CACHE_MODE__MASK)
+#define VIVS_BLT_CONFIG_INPLACE_BOTH 0x00000800
+#define VIVS_BLT_CONFIG_INPLACE_BPP__MASK 0x00038000
+#define VIVS_BLT_CONFIG_INPLACE_BPP__SHIFT 15
+#define VIVS_BLT_CONFIG_INPLACE_BPP_1 0x00000000
+#define VIVS_BLT_CONFIG_INPLACE_BPP_2 0x00008000
+#define VIVS_BLT_CONFIG_INPLACE_BPP_4 0x00010000
+#define VIVS_BLT_CONFIG_INPLACE_BPP_8 0x00018000
+#define VIVS_BLT_CONFIG_INPLACE_BPP_16 0x00020000
+
+#define VIVS_BLT_INPLACE_TILE_COUNT 0x00014068
+
+#define VIVS_BLT_YUV 0x00000000
+
+#define VIVS_BLT_YUV_CONFIG 0x0001406c
+
+#define VIVS_BLT_YUV_UNK14070 0x00014070
+
+#define VIVS_BLT_YUV_SRC_YADDR 0x00014074
+
+#define VIVS_BLT_YUV_SRC_YSTRIDE 0x00014078
+
+#define VIVS_BLT_YUV_SRC_UADDR 0x0001407c
+
+#define VIVS_BLT_YUV_SRC_USTRIDE 0x00014080
+
+#define VIVS_BLT_YUV_SRC_VADDR 0x00014084
+
+#define VIVS_BLT_YUV_SRC_VSTRIDE 0x00014088
+
+#define VIVS_BLT_YUV_DEST_ADDR 0x0001408c
+
+#define VIVS_BLT_YUV_DEST_STRIDE 0x00014090
+
+#define VIVS_BLT_UNK1409C 0x0001409c
+
+#define VIVS_BLT_UNK140A0 0x000140a0
+
+#define VIVS_BLT_FENCE_OUT_ADDRESS 0x000140a4
+
+#define VIVS_BLT_FENCE_OUT_DATA_LOW 0x000140a8
+
+#define VIVS_BLT_SET_COMMAND 0x000140ac
+
+#define VIVS_BLT_MIPMAP_CONFIG 0x000140b0
+#define VIVS_BLT_MIPMAP_CONFIG_NUM__MASK 0x0000001f
+#define VIVS_BLT_MIPMAP_CONFIG_NUM__SHIFT 0
+#define VIVS_BLT_MIPMAP_CONFIG_NUM(x) (((x) << VIVS_BLT_MIPMAP_CONFIG_NUM__SHIFT) & VIVS_BLT_MIPMAP_CONFIG_NUM__MASK)
+#define VIVS_BLT_MIPMAP_CONFIG_UNK5 0x00000020
+
+#define VIVS_BLT_FENCE_OUT_DATA_HIGH 0x000140b4
+
+#define VIVS_BLT_ENABLE 0x000140b8
+#define VIVS_BLT_ENABLE_ENABLE 0x00000001
+
+#define VIVS_BLT_SWIZZLE 0x000140bc
+#define VIVS_BLT_SWIZZLE_SRC_R__MASK 0x00000007
+#define VIVS_BLT_SWIZZLE_SRC_R__SHIFT 0
+#define VIVS_BLT_SWIZZLE_SRC_R(x) (((x) << VIVS_BLT_SWIZZLE_SRC_R__SHIFT) & VIVS_BLT_SWIZZLE_SRC_R__MASK)
+#define VIVS_BLT_SWIZZLE_SRC_G__MASK 0x00000038
+#define VIVS_BLT_SWIZZLE_SRC_G__SHIFT 3
+#define VIVS_BLT_SWIZZLE_SRC_G(x) (((x) << VIVS_BLT_SWIZZLE_SRC_G__SHIFT) & VIVS_BLT_SWIZZLE_SRC_G__MASK)
+#define VIVS_BLT_SWIZZLE_SRC_B__MASK 0x000001c0
+#define VIVS_BLT_SWIZZLE_SRC_B__SHIFT 6
+#define VIVS_BLT_SWIZZLE_SRC_B(x) (((x) << VIVS_BLT_SWIZZLE_SRC_B__SHIFT) & VIVS_BLT_SWIZZLE_SRC_B__MASK)
+#define VIVS_BLT_SWIZZLE_SRC_A__MASK 0x00000e00
+#define VIVS_BLT_SWIZZLE_SRC_A__SHIFT 9
+#define VIVS_BLT_SWIZZLE_SRC_A(x) (((x) << VIVS_BLT_SWIZZLE_SRC_A__SHIFT) & VIVS_BLT_SWIZZLE_SRC_A__MASK)
+#define VIVS_BLT_SWIZZLE_DEST_R__MASK 0x00007000
+#define VIVS_BLT_SWIZZLE_DEST_R__SHIFT 12
+#define VIVS_BLT_SWIZZLE_DEST_R(x) (((x) << VIVS_BLT_SWIZZLE_DEST_R__SHIFT) & VIVS_BLT_SWIZZLE_DEST_R__MASK)
+#define VIVS_BLT_SWIZZLE_DEST_G__MASK 0x00038000
+#define VIVS_BLT_SWIZZLE_DEST_G__SHIFT 15
+#define VIVS_BLT_SWIZZLE_DEST_G(x) (((x) << VIVS_BLT_SWIZZLE_DEST_G__SHIFT) & VIVS_BLT_SWIZZLE_DEST_G__MASK)
+#define VIVS_BLT_SWIZZLE_DEST_B__MASK 0x001c0000
+#define VIVS_BLT_SWIZZLE_DEST_B__SHIFT 18
+#define VIVS_BLT_SWIZZLE_DEST_B(x) (((x) << VIVS_BLT_SWIZZLE_DEST_B__SHIFT) & VIVS_BLT_SWIZZLE_DEST_B__MASK)
+#define VIVS_BLT_SWIZZLE_DEST_A__MASK 0x00e00000
+#define VIVS_BLT_SWIZZLE_DEST_A__SHIFT 21
+#define VIVS_BLT_SWIZZLE_DEST_A(x) (((x) << VIVS_BLT_SWIZZLE_DEST_A__SHIFT) & VIVS_BLT_SWIZZLE_DEST_A__MASK)
+
+#define VIVS_BLT_MIP(i0) (0x00000000 + 0x4*(i0))
+#define VIVS_BLT_MIP__ESIZE 0x00000004
+#define VIVS_BLT_MIP__LEN 0x0000000d
+
+#define VIVS_BLT_MIP_ADDR(i0) (0x000140c0 + 0x4*(i0))
+
+#define VIVS_BLT_MIP_STRIDE(i0) (0x00014300 + 0x4*(i0))
+
+#define VIVS_BLT_SRC_END 0x000140f4
+
+#define VIVS_BLT_DEST_END 0x00014334
+
+
+#endif /* STATE_BLT_XML */
diff --git a/src/gallium/drivers/etnaviv/hw/texdesc_3d.xml.h b/src/gallium/drivers/etnaviv/hw/texdesc_3d.xml.h
new file mode 100644
index 00000000000..4916938e9db
--- /dev/null
+++ b/src/gallium/drivers/etnaviv/hw/texdesc_3d.xml.h
@@ -0,0 +1,194 @@
+#ifndef TEXDESC_3D_XML
+#define TEXDESC_3D_XML
+
+/* Autogenerated file, DO NOT EDIT manually!
+
+This file was generated by the rules-ng-ng headergen tool in this git repository:
+http://0x04.net/cgit/index.cgi/rules-ng-ng
+git clone git://0x04.net/rules-ng-ng
+
+The rules-ng-ng source files this header was generated from are:
+- texdesc_3d.xml ( 3183 bytes, from 2017-10-31 19:05:01)
+- copyright.xml ( 1597 bytes, from 2016-10-29 07:29:22)
+- common.xml ( 26187 bytes, from 2017-10-31 19:05:01)
+- common_3d.xml ( 14547 bytes, from 2017-11-01 16:08:07)
+
+Copyright (C) 2012-2017 by the following authors:
+- Wladimir J. van der Laan <[email protected]>
+- Christian Gmeiner <[email protected]>
+- Lucas Stach <[email protected]>
+- Russell King <[email protected]>
+
+Permission is hereby granted, free of charge, to any person obtaining a
+copy of this software and associated documentation files (the "Software"),
+to deal in the Software without restriction, including without limitation
+the rights to use, copy, modify, merge, publish, distribute, sub license,
+and/or sell copies of the Software, and to permit persons to whom the
+Software is furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice (including the
+next paragraph) shall be included in all copies or substantial portions
+of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+DEALINGS IN THE SOFTWARE.
+*/
+
+
+#define TEXDESC_LOD_ADDR(i0) (0x00000000 + 0x4*(i0))
+#define TEXDESC_LOD_ADDR__ESIZE 0x00000004
+#define TEXDESC_LOD_ADDR__LEN 0x00000010
+
+#define TEXDESC_CONFIG0 0x00000040
+#define TEXDESC_CONFIG0_TYPE__MASK 0x00000007
+#define TEXDESC_CONFIG0_TYPE__SHIFT 0
+#define TEXDESC_CONFIG0_TYPE(x) (((x) << TEXDESC_CONFIG0_TYPE__SHIFT) & TEXDESC_CONFIG0_TYPE__MASK)
+#define TEXDESC_CONFIG0_UWRAP__MASK 0x00000018
+#define TEXDESC_CONFIG0_UWRAP__SHIFT 3
+#define TEXDESC_CONFIG0_UWRAP(x) (((x) << TEXDESC_CONFIG0_UWRAP__SHIFT) & TEXDESC_CONFIG0_UWRAP__MASK)
+#define TEXDESC_CONFIG0_VWRAP__MASK 0x00000060
+#define TEXDESC_CONFIG0_VWRAP__SHIFT 5
+#define TEXDESC_CONFIG0_VWRAP(x) (((x) << TEXDESC_CONFIG0_VWRAP__SHIFT) & TEXDESC_CONFIG0_VWRAP__MASK)
+#define TEXDESC_CONFIG0_MIN__MASK 0x00000180
+#define TEXDESC_CONFIG0_MIN__SHIFT 7
+#define TEXDESC_CONFIG0_MIN(x) (((x) << TEXDESC_CONFIG0_MIN__SHIFT) & TEXDESC_CONFIG0_MIN__MASK)
+#define TEXDESC_CONFIG0_MIP__MASK 0x00000600
+#define TEXDESC_CONFIG0_MIP__SHIFT 9
+#define TEXDESC_CONFIG0_MIP(x) (((x) << TEXDESC_CONFIG0_MIP__SHIFT) & TEXDESC_CONFIG0_MIP__MASK)
+#define TEXDESC_CONFIG0_MAG__MASK 0x00001800
+#define TEXDESC_CONFIG0_MAG__SHIFT 11
+#define TEXDESC_CONFIG0_MAG(x) (((x) << TEXDESC_CONFIG0_MAG__SHIFT) & TEXDESC_CONFIG0_MAG__MASK)
+#define TEXDESC_CONFIG0_FORMAT__MASK 0x0003e000
+#define TEXDESC_CONFIG0_FORMAT__SHIFT 13
+#define TEXDESC_CONFIG0_FORMAT(x) (((x) << TEXDESC_CONFIG0_FORMAT__SHIFT) & TEXDESC_CONFIG0_FORMAT__MASK)
+#define TEXDESC_CONFIG0_ROUND_UV 0x00080000
+#define TEXDESC_CONFIG0_ENDIAN__MASK 0x00c00000
+#define TEXDESC_CONFIG0_ENDIAN__SHIFT 22
+#define TEXDESC_CONFIG0_ENDIAN(x) (((x) << TEXDESC_CONFIG0_ENDIAN__SHIFT) & TEXDESC_CONFIG0_ENDIAN__MASK)
+#define TEXDESC_CONFIG0_ANISOTROPY__MASK 0xff000000
+#define TEXDESC_CONFIG0_ANISOTROPY__SHIFT 24
+#define TEXDESC_CONFIG0_ANISOTROPY(x) (((x) << TEXDESC_CONFIG0_ANISOTROPY__SHIFT) & TEXDESC_CONFIG0_ANISOTROPY__MASK)
+
+#define TEXDESC_SIZE 0x00000044
+#define TEXDESC_SIZE_WIDTH__MASK 0x0000ffff
+#define TEXDESC_SIZE_WIDTH__SHIFT 0
+#define TEXDESC_SIZE_WIDTH(x) (((x) << TEXDESC_SIZE_WIDTH__SHIFT) & TEXDESC_SIZE_WIDTH__MASK)
+#define TEXDESC_SIZE_HEIGHT__MASK 0xffff0000
+#define TEXDESC_SIZE_HEIGHT__SHIFT 16
+#define TEXDESC_SIZE_HEIGHT(x) (((x) << TEXDESC_SIZE_HEIGHT__SHIFT) & TEXDESC_SIZE_HEIGHT__MASK)
+
+#define TEXDESC_LINEAR_STRIDE 0x00000048
+
+#define TEXDESC_CONFIG1 0x0000004c
+#define TEXDESC_CONFIG1_FORMAT_EXT__MASK 0x0000003f
+#define TEXDESC_CONFIG1_FORMAT_EXT__SHIFT 0
+#define TEXDESC_CONFIG1_FORMAT_EXT(x) (((x) << TEXDESC_CONFIG1_FORMAT_EXT__SHIFT) & TEXDESC_CONFIG1_FORMAT_EXT__MASK)
+#define TEXDESC_CONFIG1_SWIZZLE_R__MASK 0x00000700
+#define TEXDESC_CONFIG1_SWIZZLE_R__SHIFT 8
+#define TEXDESC_CONFIG1_SWIZZLE_R(x) (((x) << TEXDESC_CONFIG1_SWIZZLE_R__SHIFT) & TEXDESC_CONFIG1_SWIZZLE_R__MASK)
+#define TEXDESC_CONFIG1_SWIZZLE_G__MASK 0x00007000
+#define TEXDESC_CONFIG1_SWIZZLE_G__SHIFT 12
+#define TEXDESC_CONFIG1_SWIZZLE_G(x) (((x) << TEXDESC_CONFIG1_SWIZZLE_G__SHIFT) & TEXDESC_CONFIG1_SWIZZLE_G__MASK)
+#define TEXDESC_CONFIG1_SWIZZLE_B__MASK 0x00070000
+#define TEXDESC_CONFIG1_SWIZZLE_B__SHIFT 16
+#define TEXDESC_CONFIG1_SWIZZLE_B(x) (((x) << TEXDESC_CONFIG1_SWIZZLE_B__SHIFT) & TEXDESC_CONFIG1_SWIZZLE_B__MASK)
+#define TEXDESC_CONFIG1_SWIZZLE_A__MASK 0x00700000
+#define TEXDESC_CONFIG1_SWIZZLE_A__SHIFT 20
+#define TEXDESC_CONFIG1_SWIZZLE_A(x) (((x) << TEXDESC_CONFIG1_SWIZZLE_A__SHIFT) & TEXDESC_CONFIG1_SWIZZLE_A__MASK)
+#define TEXDESC_CONFIG1_CACHE_MODE__MASK 0x00800000
+#define TEXDESC_CONFIG1_CACHE_MODE__SHIFT 23
+#define TEXDESC_CONFIG1_CACHE_MODE(x) (((x) << TEXDESC_CONFIG1_CACHE_MODE__SHIFT) & TEXDESC_CONFIG1_CACHE_MODE__MASK)
+#define TEXDESC_CONFIG1_TEXTURE_ARRAY 0x01000000
+#define TEXDESC_CONFIG1_UNK25 0x02000000
+#define TEXDESC_CONFIG1_HALIGN__MASK 0x1c000000
+#define TEXDESC_CONFIG1_HALIGN__SHIFT 26
+#define TEXDESC_CONFIG1_HALIGN(x) (((x) << TEXDESC_CONFIG1_HALIGN__SHIFT) & TEXDESC_CONFIG1_HALIGN__MASK)
+
+#define TEXDESC_CONTROL_YUV 0x00000050
+
+#define TEXDESC_STRIDE_YUV 0x00000054
+
+#define TEXDESC_ASTC0 0x00000058
+#define TEXDESC_ASTC0_ASTC_FORMAT__MASK 0x000000ff
+#define TEXDESC_ASTC0_ASTC_FORMAT__SHIFT 0
+#define TEXDESC_ASTC0_ASTC_FORMAT(x) (((x) << TEXDESC_ASTC0_ASTC_FORMAT__SHIFT) & TEXDESC_ASTC0_ASTC_FORMAT__MASK)
+#define TEXDESC_ASTC0_UNK8__MASK 0x0000ff00
+#define TEXDESC_ASTC0_UNK8__SHIFT 8
+#define TEXDESC_ASTC0_UNK8(x) (((x) << TEXDESC_ASTC0_UNK8__SHIFT) & TEXDESC_ASTC0_UNK8__MASK)
+#define TEXDESC_ASTC0_UNK16__MASK 0x00ff0000
+#define TEXDESC_ASTC0_UNK16__SHIFT 16
+#define TEXDESC_ASTC0_UNK16(x) (((x) << TEXDESC_ASTC0_UNK16__SHIFT) & TEXDESC_ASTC0_UNK16__MASK)
+#define TEXDESC_ASTC0_UNK24__MASK 0xff000000
+#define TEXDESC_ASTC0_UNK24__SHIFT 24
+#define TEXDESC_ASTC0_UNK24(x) (((x) << TEXDESC_ASTC0_UNK24__SHIFT) & TEXDESC_ASTC0_UNK24__MASK)
+
+#define TEXDESC_ASTC1 0x0000005c
+
+#define TEXDESC_ASTC2 0x00000060
+
+#define TEXDESC_ASTC3 0x00000064
+
+#define TEXDESC_BASELOD 0x00000068
+#define TEXDESC_BASELOD_UNK23 0x00800000
+#define TEXDESC_BASELOD_BASELOD__MASK 0x0000000f
+#define TEXDESC_BASELOD_BASELOD__SHIFT 0
+#define TEXDESC_BASELOD_BASELOD(x) (((x) << TEXDESC_BASELOD_BASELOD__SHIFT) & TEXDESC_BASELOD_BASELOD__MASK)
+#define TEXDESC_BASELOD_MAXLOD__MASK 0x00000f00
+#define TEXDESC_BASELOD_MAXLOD__SHIFT 8
+#define TEXDESC_BASELOD_MAXLOD(x) (((x) << TEXDESC_BASELOD_MAXLOD__SHIFT) & TEXDESC_BASELOD_MAXLOD__MASK)
+
+#define TEXDESC_CONFIG2 0x0000006c
+
+#define TEXDESC_CONFIG3 0x00000070
+
+#define TEXDESC_LOG_SIZE_EXT 0x00000074
+#define TEXDESC_LOG_SIZE_EXT_WIDTH__MASK 0x0000ffff
+#define TEXDESC_LOG_SIZE_EXT_WIDTH__SHIFT 0
+#define TEXDESC_LOG_SIZE_EXT_WIDTH(x) (((x) << TEXDESC_LOG_SIZE_EXT_WIDTH__SHIFT) & TEXDESC_LOG_SIZE_EXT_WIDTH__MASK)
+#define TEXDESC_LOG_SIZE_EXT_HEIGHT__MASK 0xffff0000
+#define TEXDESC_LOG_SIZE_EXT_HEIGHT__SHIFT 16
+#define TEXDESC_LOG_SIZE_EXT_HEIGHT(x) (((x) << TEXDESC_LOG_SIZE_EXT_HEIGHT__SHIFT) & TEXDESC_LOG_SIZE_EXT_HEIGHT__MASK)
+
+#define TEXDESC_VOLUME 0x00000078
+
+#define TEXDESC_SLICE 0x0000007c
+
+#define TEXDESC_BORDER_COLOR 0x00000080
+
+#define TEXDESC_3D_CONFIG 0x00000084
+#define TEXDESC_3D_CONFIG_DEPTH__MASK 0x00003fff
+#define TEXDESC_3D_CONFIG_DEPTH__SHIFT 0
+#define TEXDESC_3D_CONFIG_DEPTH(x) (((x) << TEXDESC_3D_CONFIG_DEPTH__SHIFT) & TEXDESC_3D_CONFIG_DEPTH__MASK)
+#define TEXDESC_3D_CONFIG_LOG_DEPTH__MASK 0x03ff0000
+#define TEXDESC_3D_CONFIG_LOG_DEPTH__SHIFT 16
+#define TEXDESC_3D_CONFIG_LOG_DEPTH(x) (((x) << TEXDESC_3D_CONFIG_LOG_DEPTH__SHIFT) & TEXDESC_3D_CONFIG_LOG_DEPTH__MASK)
+#define TEXDESC_3D_CONFIG_WRAP__MASK 0x30000000
+#define TEXDESC_3D_CONFIG_WRAP__SHIFT 28
+#define TEXDESC_3D_CONFIG_WRAP(x) (((x) << TEXDESC_3D_CONFIG_WRAP__SHIFT) & TEXDESC_3D_CONFIG_WRAP__MASK)
+
+#define TEXDESC_LOG_SIZE 0x00000088
+#define TEXDESC_LOG_SIZE_WIDTH__MASK 0x000003ff
+#define TEXDESC_LOG_SIZE_WIDTH__SHIFT 0
+#define TEXDESC_LOG_SIZE_WIDTH(x) (((x) << TEXDESC_LOG_SIZE_WIDTH__SHIFT) & TEXDESC_LOG_SIZE_WIDTH__MASK)
+#define TEXDESC_LOG_SIZE_HEIGHT__MASK 0x000ffc00
+#define TEXDESC_LOG_SIZE_HEIGHT__SHIFT 10
+#define TEXDESC_LOG_SIZE_HEIGHT(x) (((x) << TEXDESC_LOG_SIZE_HEIGHT__SHIFT) & TEXDESC_LOG_SIZE_HEIGHT__MASK)
+#define TEXDESC_LOG_SIZE_ASTC 0x10000000
+#define TEXDESC_LOG_SIZE_RGB 0x20000000
+#define TEXDESC_LOG_SIZE_SRGB 0x80000000
+
+#define TEXDESC_BORDER_COLOR_R 0x0000008c
+
+#define TEXDESC_BORDER_COLOR_G 0x00000090
+
+#define TEXDESC_BORDER_COLOR_B 0x00000094
+
+#define TEXDESC_BORDER_COLOR_A 0x00000098
+
+
+#endif /* TEXDESC_3D_XML */
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-01 20:54:33 +0000