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authorNicolai Hähnle <[email protected]>2017-12-13 13:25:23 +0100
committerMarek Olšák <[email protected]>2019-07-03 15:51:12 -0400
commitefe1cd4859821023ff5a3a8c46857eab455edb75 (patch)
treec80f4af591267b650f79ec9a56b0a01480c0cf5e /src
parent1ce52c1e37392243cede3e1e74738d5090ea0405 (diff)
radeonsi/gfx10: use the correct register for image descriptor dumping
Acked-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/radeonsi/si_debug.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeonsi/si_debug.c b/src/gallium/drivers/radeonsi/si_debug.c
index 4a768ec5a37..c9c78733099 100644
--- a/src/gallium/drivers/radeonsi/si_debug.c
+++ b/src/gallium/drivers/radeonsi/si_debug.c
@@ -702,6 +702,8 @@ static void
si_log_chunk_desc_list_print(void *data, FILE *f)
{
struct si_log_chunk_desc_list *chunk = data;
+ unsigned sq_img_rsrc_word0 = chunk->chip_class >= GFX10 ? R_00A000_SQ_IMG_RSRC_WORD0
+ : R_008F10_SQ_IMG_RSRC_WORD0;
for (unsigned i = 0; i < chunk->num_elements; i++) {
unsigned cpu_dw_offset = i * chunk->element_dw_size;
@@ -723,7 +725,7 @@ si_log_chunk_desc_list_print(void *data, FILE *f)
case 8:
for (unsigned j = 0; j < 8; j++)
ac_dump_reg(f, chunk->chip_class,
- R_008F10_SQ_IMG_RSRC_WORD0 + j*4,
+ sq_img_rsrc_word0 + j*4,
gpu_list[j], 0xffffffff);
fprintf(f, COLOR_CYAN " Buffer:" COLOR_RESET "\n");
@@ -735,7 +737,7 @@ si_log_chunk_desc_list_print(void *data, FILE *f)
case 16:
for (unsigned j = 0; j < 8; j++)
ac_dump_reg(f, chunk->chip_class,
- R_008F10_SQ_IMG_RSRC_WORD0 + j*4,
+ sq_img_rsrc_word0 + j*4,
gpu_list[j], 0xffffffff);
fprintf(f, COLOR_CYAN " Buffer:" COLOR_RESET "\n");
@@ -747,7 +749,7 @@ si_log_chunk_desc_list_print(void *data, FILE *f)
fprintf(f, COLOR_CYAN " FMASK:" COLOR_RESET "\n");
for (unsigned j = 0; j < 8; j++)
ac_dump_reg(f, chunk->chip_class,
- R_008F10_SQ_IMG_RSRC_WORD0 + j*4,
+ sq_img_rsrc_word0 + j*4,
gpu_list[8+j], 0xffffffff);
fprintf(f, COLOR_CYAN " Sampler state:" COLOR_RESET "\n");