diff options
| author | Zhenyu Wang <[email protected]> | 2010-12-23 16:30:20 +0800 |
|---|---|---|
| committer | Zhenyu Wang <[email protected]> | 2010-12-23 17:30:03 +0800 |
| commit | de6fd527a545f8344e074312544517d05573fb72 (patch) | |
| tree | a317a19a1bd15ce5eb36a656659098a11523ec7e /src | |
| parent | 845d651cf686ba885dffd9e05df971fa68c3431a (diff) | |
i965: upload multisample state for fragment program change
This makes conformance tests stable on sandybridge D0 to track
multisample state before SF/WM state.
Diffstat (limited to 'src')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_misc_state.c | 61 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_state.h | 1 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_state_upload.c | 1 |
3 files changed, 38 insertions, 25 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c index a91b0528fac..0e629a17476 100644 --- a/src/mesa/drivers/dri/i965/brw_misc_state.c +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c @@ -488,31 +488,6 @@ static void upload_invarient_state( struct brw_context *brw ) BRW_BATCH_STRUCT(brw, &gdo); } - if (intel->gen >= 6) { - int i; - - BEGIN_BATCH(3); - OUT_BATCH(CMD_3D_MULTISAMPLE << 16 | (3 - 2)); - OUT_BATCH(MS_PIXEL_LOCATION_CENTER | - MS_NUMSAMPLES_1); - OUT_BATCH(0); /* positions for 4/8-sample */ - ADVANCE_BATCH(); - - BEGIN_BATCH(2); - OUT_BATCH(CMD_3D_SAMPLE_MASK << 16 | (2 - 2)); - OUT_BATCH(1); - ADVANCE_BATCH(); - - for (i = 0; i < 4; i++) { - BEGIN_BATCH(4); - OUT_BATCH(CMD_GS_SVB_INDEX << 16 | (4 - 2)); - OUT_BATCH(i << SVB_INDEX_SHIFT); - OUT_BATCH(0); - OUT_BATCH(0xffffffff); - ADVANCE_BATCH(); - } - } - /* 0x61020000 State Instruction Pointer */ { struct brw_system_instruction_pointer sip; @@ -547,6 +522,42 @@ const struct brw_tracked_state brw_invarient_state = { .emit = upload_invarient_state }; +static void gen6_upload_multisample_state( struct brw_context *brw ) +{ + struct intel_context *intel = &brw->intel; + int i; + + BEGIN_BATCH(3); + OUT_BATCH(CMD_3D_MULTISAMPLE << 16 | (3 - 2)); + OUT_BATCH(MS_PIXEL_LOCATION_CENTER | + MS_NUMSAMPLES_1); + OUT_BATCH(0); /* positions for 4/8-sample */ + ADVANCE_BATCH(); + + BEGIN_BATCH(2); + OUT_BATCH(CMD_3D_SAMPLE_MASK << 16 | (2 - 2)); + OUT_BATCH(1); + ADVANCE_BATCH(); + + for (i = 0; i < 4; i++) { + BEGIN_BATCH(4); + OUT_BATCH(CMD_GS_SVB_INDEX << 16 | (4 - 2)); + OUT_BATCH(i << SVB_INDEX_SHIFT); + OUT_BATCH(0); + OUT_BATCH(0xffffffff); + ADVANCE_BATCH(); + } +} + +const struct brw_tracked_state gen6_multisample_state = { + .dirty = { + .mesa = 0, + .brw = (BRW_NEW_CONTEXT | BRW_NEW_FRAGMENT_PROGRAM), + .cache = 0, + }, + .emit = gen6_upload_multisample_state +}; + /** * Define the base addresses which some state is referenced from. * diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h index 4bb93e73369..0ef829e7169 100644 --- a/src/mesa/drivers/dri/i965/brw_state.h +++ b/src/mesa/drivers/dri/i965/brw_state.h @@ -110,6 +110,7 @@ extern const struct brw_tracked_state gen6_viewport_state; extern const struct brw_tracked_state gen6_vs_state; extern const struct brw_tracked_state gen6_wm_constants; extern const struct brw_tracked_state gen6_wm_state; +extern const struct brw_tracked_state gen6_multisample_state; /*********************************************************************** * brw_state.c diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c index eba4411ca70..817eaa4148b 100644 --- a/src/mesa/drivers/dri/i965/brw_state_upload.c +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c @@ -142,6 +142,7 @@ const struct brw_tracked_state *gen6_atoms[] = &gen6_vs_state, &gen6_gs_state, &gen6_clip_state, + &gen6_multisample_state, &gen6_sf_state, &gen6_wm_state, |