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authorMarek Olšák <[email protected]>2016-11-06 22:27:56 +0100
committerMarek Olšák <[email protected]>2016-11-10 18:34:55 +0100
commitce3f453f0165d0ef29fa482e4ec1f89aa9706b1d (patch)
tree96fcdf7dd9ea12e22fd9045e699104a6af156015 /src
parentce3189cbe64d17264dde1500fc4cf93c1d5b0d53 (diff)
radeonsi: fix r600_texture::tc_compatible_htile
htile_size is now always non-zero if HTILE is allocated. It seems to have caused no issues. Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/radeon/r600_texture.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index 693330474a3..97673ee2250 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -1007,9 +1007,9 @@ r600_texture_create_object(struct pipe_screen *screen,
rtex->surface = *surface;
rtex->size = rtex->surface.surf_size;
- rtex->tc_compatible_htile = rtex->surface.htile_size != 0;
- assert(!!(rtex->surface.flags & RADEON_SURF_TC_COMPATIBLE_HTILE) ==
- rtex->tc_compatible_htile);
+ rtex->tc_compatible_htile = rtex->surface.htile_size != 0 &&
+ (rtex->surface.flags &
+ RADEON_SURF_TC_COMPATIBLE_HTILE);
/* TC-compatible HTILE only supports Z32_FLOAT. */
if (rtex->tc_compatible_htile)