diff options
author | Alyssa Rosenzweig <[email protected]> | 2019-08-05 17:40:55 -0700 |
---|---|---|
committer | Alyssa Rosenzweig <[email protected]> | 2019-08-12 12:43:03 -0700 |
commit | b1965831e41c97fbfb53b2c648ae773a4dac32fa (patch) | |
tree | 8d16afb7f58e64379e7493d6414e9afa7e7e58bc /src | |
parent | 41e68094f82ab6f05a8084d0de753f1c95eda26d (diff) |
pan/midgard: Handle 64-bit address in mir_mask_of_read_components
This is a bit of a hack, but it'll hold us over until we have 64-bit
support wired through.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/panfrost/midgard/mir.c | 37 |
1 files changed, 36 insertions, 1 deletions
diff --git a/src/panfrost/midgard/mir.c b/src/panfrost/midgard/mir.c index eb8cc9c2abd..8422e93c989 100644 --- a/src/panfrost/midgard/mir.c +++ b/src/panfrost/midgard/mir.c @@ -376,6 +376,26 @@ mir_source_count(midgard_instruction *ins) } } +static unsigned +mir_component_count_implicit(midgard_instruction *ins, unsigned i) +{ + if (ins->type == TAG_LOAD_STORE_4) { + switch (ins->load_store.op) { + /* Address implicitly 64-bit */ + case midgard_op_ld_int4: + return (i == 0) ? 1 : 0; + + case midgard_op_st_int4: + return (i == 1) ? 1 : 0; + + default: + return 0; + } + } + + return 0; +} + unsigned mir_mask_of_read_components(midgard_instruction *ins, unsigned node) { @@ -385,7 +405,22 @@ mir_mask_of_read_components(midgard_instruction *ins, unsigned node) if (ins->ssa_args.src[i] != node) continue; unsigned swizzle = mir_get_swizzle(ins, i); - mask |= mir_mask_of_read_components_single(swizzle, ins->mask); + unsigned m = mir_mask_of_read_components_single(swizzle, ins->mask); + + /* Sometimes multi-arg ops are passed implicitly */ + unsigned implicit = mir_component_count_implicit(ins, i); + assert(implicit < 2); + + /* Extend the mask */ + if (implicit == 1) { + /* Ensure it's a single bit currently */ + assert((m >> __builtin_ctz(m)) == 0x1); + + /* Set the next bit to extend one*/ + m |= (m << 1); + } + + mask |= m; } return mask; |