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authorIago Toral Quiroga <[email protected]>2015-08-04 10:06:41 +0200
committerIago Toral Quiroga <[email protected]>2015-08-07 08:12:57 +0200
commita0b7c1c86e028309e639368b2b556b755761f68f (patch)
treec3e61df244365ab38fb2af69104facd8198d1708 /src
parentf246aa6bcab57f85a143cbfe7e9de24237921249 (diff)
i965/vec4: Fix indentation in vec4_visitor::evaluate_spill_costs
Reviewed-by: Francisco Jerez <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp24
1 files changed, 12 insertions, 12 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
index cd89edd64de..617c9889cad 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
@@ -280,15 +280,15 @@ vec4_visitor::evaluate_spill_costs(float *spill_costs, bool *no_spill)
*/
foreach_block_and_inst(block, vec4_instruction, inst, cfg) {
for (unsigned int i = 0; i < 3; i++) {
- if (inst->src[i].file == GRF) {
- spill_costs[inst->src[i].reg] += loop_scale;
+ if (inst->src[i].file == GRF) {
+ spill_costs[inst->src[i].reg] += loop_scale;
if (inst->src[i].reladdr)
no_spill[inst->src[i].reg] = true;
- }
+ }
}
if (inst->dst.file == GRF) {
- spill_costs[inst->dst.reg] += loop_scale;
+ spill_costs[inst->dst.reg] += loop_scale;
if (inst->dst.reladdr)
no_spill[inst->dst.reg] = true;
}
@@ -296,12 +296,12 @@ vec4_visitor::evaluate_spill_costs(float *spill_costs, bool *no_spill)
switch (inst->opcode) {
case BRW_OPCODE_DO:
- loop_scale *= 10;
- break;
+ loop_scale *= 10;
+ break;
case BRW_OPCODE_WHILE:
- loop_scale /= 10;
- break;
+ loop_scale /= 10;
+ break;
case SHADER_OPCODE_GEN4_SCRATCH_READ:
case SHADER_OPCODE_GEN4_SCRATCH_WRITE:
@@ -309,12 +309,12 @@ vec4_visitor::evaluate_spill_costs(float *spill_costs, bool *no_spill)
if (inst->src[i].file == GRF)
no_spill[inst->src[i].reg] = true;
}
- if (inst->dst.file == GRF)
- no_spill[inst->dst.reg] = true;
- break;
+ if (inst->dst.file == GRF)
+ no_spill[inst->dst.reg] = true;
+ break;
default:
- break;
+ break;
}
}
}