diff options
| author | Samuel Pitoiset <[email protected]> | 2019-06-25 11:24:48 +0200 |
|---|---|---|
| committer | Bas Nieuwenhuizen <[email protected]> | 2019-07-07 17:03:38 +0200 |
| commit | 9a01eded0c318dbf0fe09a57e5ce032a27ebe5eb (patch) | |
| tree | 57b0019a690b3bee69370523fae30c2813271277 /src | |
| parent | 6b9dbb28ef71c2278dc41b8e72b55914dee7a635 (diff) | |
radv/gfx10: set llvm_has_working_vgpr_indexing
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/amd/common/ac_nir_to_llvm.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 3f8625630bc..7cf10c456e2 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -4415,10 +4415,9 @@ void ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class) { /* While it would be nice not to have this flag, we are constrained - * by the reality that LLVM 5.0 doesn't have working VGPR indexing - * on GFX9. + * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9. */ - bool llvm_has_working_vgpr_indexing = chip_class <= GFX8; + bool llvm_has_working_vgpr_indexing = chip_class != GFX9; /* TODO: Indirect indexing of GS inputs is unimplemented. * |