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authorVadim Girlin <[email protected]>2012-05-15 18:47:38 +0400
committerVadim Girlin <[email protected]>2012-05-15 18:47:38 +0400
commit76e4898ba3c67082524786a0e0c67557a8abc58b (patch)
tree9853f9335e9473387e3782742785068db10dd864 /src
parent4b8db65dbfc4074f045ea0319edd8de2f59545bf (diff)
radeon/llvm: fix BUILD_VECTOR lowering for replicated value
We expect that all elements will be assigned even if they are equal Signed-off-by: Vadim Girlin <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/radeon/AMDILISelLowering.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/AMDILISelLowering.cpp b/src/gallium/drivers/radeon/AMDILISelLowering.cpp
index 19b12fcf72b..570927df974 100644
--- a/src/gallium/drivers/radeon/AMDILISelLowering.cpp
+++ b/src/gallium/drivers/radeon/AMDILISelLowering.cpp
@@ -3894,6 +3894,7 @@ AMDILTargetLowering::LowerBUILD_VECTOR( SDValue Op, SelectionDAG &DAG ) const
Nodes1 = DAG.getNode(AMDILISD::VBUILD,
DL,
VT, Op.getOperand(0));
+#if 0
bool allEqual = true;
for (unsigned x = 1, y = Op.getNumOperands(); x < y; ++x) {
if (Op.getOperand(0) != Op.getOperand(x)) {
@@ -3904,6 +3905,7 @@ AMDILTargetLowering::LowerBUILD_VECTOR( SDValue Op, SelectionDAG &DAG ) const
if (allEqual) {
return Nodes1;
}
+#endif
switch(Op.getNumOperands()) {
default:
case 1: