diff options
author | Jason Ekstrand <[email protected]> | 2018-05-15 15:28:05 -0700 |
---|---|---|
committer | Nanley Chery <[email protected]> | 2019-05-30 13:49:48 -0700 |
commit | 5e43a75950e8562e65cb2d1d1f07781300a29d4f (patch) | |
tree | 0fb2f60e923eff3c3d2245b24edd1ffc4dbcac33 /src | |
parent | b31a31bba512ddc9358f1bf66395a8b2b7b2c0b1 (diff) |
intel/blorp: Use the hardware op for CCS ambiguate on gen10+
Cannonlake hardware adds a new resolve type in 3DSTATE_PS called
FAST_CLEAR_0 which does an ambiguate. Now that the hardware can do it
directly, we should use that instead of binding the CCS as a render
target and doing it manually. This was tested with a full Vulkan CTS
run on Cannonlake.
Reviewed-by: Nanley Chery <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/intel/blorp/blorp_clear.c | 12 | ||||
-rw-r--r-- | src/intel/blorp/blorp_genX_exec.h | 6 |
2 files changed, 17 insertions, 1 deletions
diff --git a/src/intel/blorp/blorp_clear.c b/src/intel/blorp/blorp_clear.c index 982028dd49d..d7668eac3ca 100644 --- a/src/intel/blorp/blorp_clear.c +++ b/src/intel/blorp/blorp_clear.c @@ -898,7 +898,11 @@ blorp_ccs_resolve(struct blorp_batch *batch, params.x1 = ALIGN(params.x1, x_scaledown) / x_scaledown; params.y1 = ALIGN(params.y1, y_scaledown) / y_scaledown; - if (batch->blorp->isl_dev->info->gen >= 9) { + if (batch->blorp->isl_dev->info->gen >= 10) { + assert(resolve_op == ISL_AUX_OP_FULL_RESOLVE || + resolve_op == ISL_AUX_OP_PARTIAL_RESOLVE || + resolve_op == ISL_AUX_OP_AMBIGUATE); + } else if (batch->blorp->isl_dev->info->gen >= 9) { assert(resolve_op == ISL_AUX_OP_FULL_RESOLVE || resolve_op == ISL_AUX_OP_PARTIAL_RESOLVE); } else { @@ -1057,6 +1061,12 @@ blorp_ccs_ambiguate(struct blorp_batch *batch, struct blorp_surf *surf, uint32_t level, uint32_t layer) { + if (ISL_DEV_GEN(batch->blorp->isl_dev) >= 10) { + /* On gen10 and above, we have a hardware resolve op for this */ + return blorp_ccs_resolve(batch, surf, level, layer, 1, + surf->surf->format, ISL_AUX_OP_AMBIGUATE); + } + struct blorp_params params; blorp_params_init(¶ms); diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h index 76a1208aa66..f3e64c56382 100644 --- a/src/intel/blorp/blorp_genX_exec.h +++ b/src/intel/blorp/blorp_genX_exec.h @@ -827,6 +827,12 @@ blorp_emit_ps_config(struct blorp_batch *batch, switch (params->fast_clear_op) { case ISL_AUX_OP_NONE: break; +#if GEN_GEN >= 10 + case ISL_AUX_OP_AMBIGUATE: + ps.RenderTargetFastClearEnable = true; + ps.RenderTargetResolveType = FAST_CLEAR_0; + break; +#endif #if GEN_GEN >= 9 case ISL_AUX_OP_PARTIAL_RESOLVE: ps.RenderTargetResolveType = RESOLVE_PARTIAL; |