diff options
| author | Dave Airlie <[email protected]> | 2019-07-18 11:19:11 +1000 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2019-07-19 11:00:44 +1000 |
| commit | 248161123cbd05a6c419ae69883b2d257db003d3 (patch) | |
| tree | 968d1050fceceb28952cd6ce1f60f385dce0ee47 /src | |
| parent | 2ac2b987801c60e5e141354ee1759b63ca85bf4c (diff) | |
radv: reset the window scissor with no clear state.
If we don't have clear state (which gfx10 doesn't currently)
we will fix to reset the scissor. AMDVLK will leave it set
to something else.
Marek also has this fix for radeonsi pending.
Reviewed-by: Samuel Pitoiset <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/amd/vulkan/si_cmd_buffer.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index 6fe447ef2e9..0efa169d674 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan/si_cmd_buffer.c @@ -202,7 +202,7 @@ si_emit_graphics(struct radv_physical_device *physical_device, /* CLEAR_STATE doesn't clear these correctly on certain generations. * I don't know why. Deduced by trial and error. */ - if (physical_device->rad_info.chip_class <= GFX7) { + if (physical_device->rad_info.chip_class <= GFX7 || !physical_device->has_clear_state) { radeon_set_context_reg(cs, R_028B28_VGT_STRMOUT_DRAW_OPAQUE_OFFSET, 0); radeon_set_context_reg(cs, R_028204_PA_SC_WINDOW_SCISSOR_TL, S_028204_WINDOW_OFFSET_DISABLE(1)); |