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authorJason Ekstrand <[email protected]>2017-02-28 18:38:27 -0800
committerJason Ekstrand <[email protected]>2017-03-01 16:14:02 -0800
commitf33d2b5d055d550b9d33547d76d353457d397fc1 (patch)
tree01f7fc63b43a1f9d58f60fedbec77d2379a94b63 /src
parent4e274bcf668e82b19715e8784bdc018d0ff439ba (diff)
i965: Move BRW_ATTRIB_WA_* defines to brw_compiler.h
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i965/brw_compiler.h14
-rw-r--r--src/mesa/drivers/dri/i965/brw_nir_attribute_workarounds.c1
-rw-r--r--src/mesa/drivers/dri/i965/brw_vs.h11
3 files changed, 13 insertions, 13 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_compiler.h b/src/mesa/drivers/dri/i965/brw_compiler.h
index 4102280ce6f..c48c3ad2dae 100644
--- a/src/mesa/drivers/dri/i965/brw_compiler.h
+++ b/src/mesa/drivers/dri/i965/brw_compiler.h
@@ -169,13 +169,25 @@ struct brw_sampler_prog_key_data {
uint32_t yx_xuxv_image_mask;
};
+/**
+ * The VF can't natively handle certain types of attributes, such as GL_FIXED
+ * or most 10_10_10_2 types. These flags enable various VS workarounds to
+ * "fix" attributes at the beginning of shaders.
+ */
+#define BRW_ATTRIB_WA_COMPONENT_MASK 7 /* mask for GL_FIXED scale channel count */
+#define BRW_ATTRIB_WA_NORMALIZE 8 /* normalize in shader */
+#define BRW_ATTRIB_WA_BGRA 16 /* swap r/b channels in shader */
+#define BRW_ATTRIB_WA_SIGN 32 /* interpret as signed in shader */
+#define BRW_ATTRIB_WA_SCALE 64 /* interpret as scaled in shader */
/** The program key for Vertex Shaders. */
struct brw_vs_prog_key {
unsigned program_string_id;
- /*
+ /**
* Per-attribute workaround flags
+ *
+ * For each attribute, a combination of BRW_ATTRIB_WA_*.
*/
uint8_t gl_attrib_wa_flags[VERT_ATTRIB_MAX];
diff --git a/src/mesa/drivers/dri/i965/brw_nir_attribute_workarounds.c b/src/mesa/drivers/dri/i965/brw_nir_attribute_workarounds.c
index 0bb766d702d..d695771f04a 100644
--- a/src/mesa/drivers/dri/i965/brw_nir_attribute_workarounds.c
+++ b/src/mesa/drivers/dri/i965/brw_nir_attribute_workarounds.c
@@ -23,7 +23,6 @@
#include "compiler/nir/nir_builder.h"
#include "brw_nir.h"
-#include "brw_vs.h"
/**
* Prior to Haswell, the hardware can't natively support GL_FIXED or
diff --git a/src/mesa/drivers/dri/i965/brw_vs.h b/src/mesa/drivers/dri/i965/brw_vs.h
index 2b49afbf1ca..0e015511d95 100644
--- a/src/mesa/drivers/dri/i965/brw_vs.h
+++ b/src/mesa/drivers/dri/i965/brw_vs.h
@@ -36,17 +36,6 @@
#include "brw_vec4.h"
-/**
- * The VF can't natively handle certain types of attributes, such as GL_FIXED
- * or most 10_10_10_2 types. These flags enable various VS workarounds to
- * "fix" attributes at the beginning of shaders.
- */
-#define BRW_ATTRIB_WA_COMPONENT_MASK 7 /* mask for GL_FIXED scale channel count */
-#define BRW_ATTRIB_WA_NORMALIZE 8 /* normalize in shader */
-#define BRW_ATTRIB_WA_BGRA 16 /* swap r/b channels in shader */
-#define BRW_ATTRIB_WA_SIGN 32 /* interpret as signed in shader */
-#define BRW_ATTRIB_WA_SCALE 64 /* interpret as scaled in shader */
-
#ifdef __cplusplus
extern "C" {
#endif