diff options
author | Kenneth Graunke <[email protected]> | 2016-09-08 23:48:53 -0700 |
---|---|---|
committer | Kenneth Graunke <[email protected]> | 2016-10-05 19:21:09 -0700 |
commit | e512941537fbc25e97ecd778433e130769e2c6ec (patch) | |
tree | 1d905192375521945bd9d286e4ebb8d823fe6831 /src | |
parent | 82c97ac710e31bea1f954060950f8b9faf2fb4d6 (diff) |
i965: Eliminate brw->tes.prog_data pointer.
Just say no to:
- brw->tes.base.prog_data = &brw->tes.prog_data->base.base;
We'll just use the brw_stage_prog_data pointer in brw_stage_state
and downcast it to brw_tes_prog_data as needed.
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Timothy Arceri <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_context.h | 1 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_state_cache.c | 1 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_state_upload.c | 1 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_tes.c | 10 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_tes_surface_state.c | 8 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/gen6_clip_state.c | 8 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/gen7_ds_state.c | 10 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/gen7_te_state.c | 3 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/gen7_urb.c | 4 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/gen8_ds_state.c | 8 |
10 files changed, 29 insertions, 25 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 301668734d3..dc93d8289cb 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -1110,7 +1110,6 @@ struct brw_context struct { struct brw_stage_state base; - struct brw_tes_prog_data *prog_data; /** * True if the 3DSTATE_DS command most recently emitted to the 3D diff --git a/src/mesa/drivers/dri/i965/brw_state_cache.c b/src/mesa/drivers/dri/i965/brw_state_cache.c index b3826f281bd..9e3318246a0 100644 --- a/src/mesa/drivers/dri/i965/brw_state_cache.c +++ b/src/mesa/drivers/dri/i965/brw_state_cache.c @@ -400,7 +400,6 @@ brw_clear_cache(struct brw_context *brw, struct brw_cache *cache) /* Also, NULL out any stale program pointers. */ brw->vs.base.prog_data = NULL; brw->tcs.base.prog_data = NULL; - brw->tes.prog_data = NULL; brw->tes.base.prog_data = NULL; brw->gs.prog_data = NULL; brw->gs.base.prog_data = NULL; diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c index 3a5ddbde1eb..17d1b2df599 100644 --- a/src/mesa/drivers/dri/i965/brw_state_upload.c +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c @@ -687,7 +687,6 @@ brw_upload_tess_programs(struct brw_context *brw) brw_upload_tes_prog(brw); } else { brw->tcs.base.prog_data = NULL; - brw->tes.prog_data = NULL; brw->tes.base.prog_data = NULL; } } diff --git a/src/mesa/drivers/dri/i965/brw_tes.c b/src/mesa/drivers/dri/i965/brw_tes.c index ad0eb2e070f..2c43a3e058f 100644 --- a/src/mesa/drivers/dri/i965/brw_tes.c +++ b/src/mesa/drivers/dri/i965/brw_tes.c @@ -223,7 +223,7 @@ brw_codegen_tes_prog(struct brw_context *brw, key, sizeof(*key), program, program_size, &prog_data, sizeof(prog_data), - &stage_state->prog_offset, &brw->tes.prog_data); + &stage_state->prog_offset, &brw->tes.base.prog_data); ralloc_free(mem_ctx); return true; @@ -285,13 +285,13 @@ brw_upload_tes_prog(struct brw_context *brw) if (!brw_search_cache(&brw->cache, BRW_CACHE_TES_PROG, &key, sizeof(key), - &stage_state->prog_offset, &brw->tes.prog_data)) { + &stage_state->prog_offset, + &brw->tes.base.prog_data)) { bool success = brw_codegen_tes_prog(brw, current[MESA_SHADER_TESS_EVAL], tep, &key); assert(success); (void)success; } - brw->tes.base.prog_data = &brw->tes.prog_data->base.base; } @@ -303,7 +303,7 @@ brw_tes_precompile(struct gl_context *ctx, struct brw_context *brw = brw_context(ctx); struct brw_tes_prog_key key; uint32_t old_prog_offset = brw->tes.base.prog_offset; - struct brw_tes_prog_data *old_prog_data = brw->tes.prog_data; + struct brw_stage_prog_data *old_prog_data = brw->tes.base.prog_data; bool success; struct gl_tess_eval_program *tep = (struct gl_tess_eval_program *)prog; @@ -331,7 +331,7 @@ brw_tes_precompile(struct gl_context *ctx, success = brw_codegen_tes_prog(brw, shader_prog, btep, &key); brw->tes.base.prog_offset = old_prog_offset; - brw->tes.prog_data = old_prog_data; + brw->tes.base.prog_data = old_prog_data; return success; } diff --git a/src/mesa/drivers/dri/i965/brw_tes_surface_state.c b/src/mesa/drivers/dri/i965/brw_tes_surface_state.c index 13a55e119c7..b1e85eebb5c 100644 --- a/src/mesa/drivers/dri/i965/brw_tes_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_tes_surface_state.c @@ -48,7 +48,7 @@ brw_upload_tes_pull_constants(struct brw_context *brw) return; /* BRW_NEW_TES_PROG_DATA */ - const struct brw_stage_prog_data *prog_data = &brw->tes.prog_data->base.base; + const struct brw_stage_prog_data *prog_data = brw->tes.base.prog_data; _mesa_shader_write_subroutine_indices(&brw->ctx, MESA_SHADER_TESS_EVAL); /* _NEW_PROGRAM_CONSTANTS */ @@ -80,7 +80,7 @@ brw_upload_tes_ubo_surfaces(struct brw_context *brw) return; /* BRW_NEW_TES_PROG_DATA */ - struct brw_stage_prog_data *prog_data = &brw->tes.prog_data->base.base; + struct brw_stage_prog_data *prog_data = brw->tes.base.prog_data; brw_upload_ubo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_TESS_EVAL], &brw->tes.base, prog_data); @@ -108,7 +108,7 @@ brw_upload_tes_abo_surfaces(struct brw_context *brw) if (prog) { /* BRW_NEW_TES_PROG_DATA */ brw_upload_abo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_TESS_EVAL], - &brw->tes.base, &brw->tes.prog_data->base.base); + &brw->tes.base, brw->tes.base.prog_data); } } @@ -134,7 +134,7 @@ brw_upload_tes_image_surfaces(struct brw_context *brw) if (prog) { /* BRW_NEW_TES_PROG_DATA, BRW_NEW_IMAGE_UNITS */ brw_upload_image_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_TESS_EVAL], - &brw->tes.base, &brw->tes.prog_data->base.base); + &brw->tes.base, brw->tes.base.prog_data); } } diff --git a/src/mesa/drivers/dri/i965/gen6_clip_state.c b/src/mesa/drivers/dri/i965/gen6_clip_state.c index 7aff0f59ce1..70efc7ca045 100644 --- a/src/mesa/drivers/dri/i965/gen6_clip_state.c +++ b/src/mesa/drivers/dri/i965/gen6_clip_state.c @@ -46,9 +46,9 @@ brw_is_drawing_points(const struct brw_context *brw) if (brw->gs.prog_data) { /* BRW_NEW_GS_PROG_DATA */ return brw->gs.prog_data->output_topology == _3DPRIM_POINTLIST; - } else if (brw->tes.prog_data) { + } else if (brw->tes.base.prog_data) { /* BRW_NEW_TES_PROG_DATA */ - return brw->tes.prog_data->output_topology == + return brw_tes_prog_data(brw->tes.base.prog_data)->output_topology == BRW_TESS_OUTPUT_TOPOLOGY_POINT; } else { /* BRW_NEW_PRIMITIVE */ @@ -69,9 +69,9 @@ brw_is_drawing_lines(const struct brw_context *brw) if (brw->gs.prog_data) { /* BRW_NEW_GS_PROG_DATA */ return brw->gs.prog_data->output_topology == _3DPRIM_LINESTRIP; - } else if (brw->tes.prog_data) { + } else if (brw->tes.base.prog_data) { /* BRW_NEW_TES_PROG_DATA */ - return brw->tes.prog_data->output_topology == + return brw_tes_prog_data(brw->tes.base.prog_data)->output_topology == BRW_TESS_OUTPUT_TOPOLOGY_LINE; } else { /* BRW_NEW_PRIMITIVE */ diff --git a/src/mesa/drivers/dri/i965/gen7_ds_state.c b/src/mesa/drivers/dri/i965/gen7_ds_state.c index a255c53df9b..1edb8fdd495 100644 --- a/src/mesa/drivers/dri/i965/gen7_ds_state.c +++ b/src/mesa/drivers/dri/i965/gen7_ds_state.c @@ -37,7 +37,7 @@ gen7_upload_tes_push_constants(struct brw_context *brw) if (tep) { /* BRW_NEW_TES_PROG_DATA */ - const struct brw_stage_prog_data *prog_data = &brw->tes.prog_data->base.base; + const struct brw_stage_prog_data *prog_data = brw->tes.base.prog_data; _mesa_shader_write_subroutine_indices(&brw->ctx, MESA_SHADER_TESS_EVAL); gen6_upload_push_constants(brw, &tep->program.Base, prog_data, stage_state, AUB_TRACE_VS_CONSTANTS); @@ -67,9 +67,11 @@ gen7_upload_ds_state(struct brw_context *brw) bool active = brw->tess_eval_program; /* BRW_NEW_TES_PROG_DATA */ - const struct brw_tes_prog_data *tes_prog_data = brw->tes.prog_data; - const struct brw_vue_prog_data *vue_prog_data = &tes_prog_data->base; - const struct brw_stage_prog_data *prog_data = &vue_prog_data->base; + const struct brw_stage_prog_data *prog_data = stage_state->prog_data; + const struct brw_vue_prog_data *vue_prog_data = + brw_vue_prog_data(stage_state->prog_data); + const struct brw_tes_prog_data *tes_prog_data = + brw_tes_prog_data(stage_state->prog_data); const unsigned thread_count = (devinfo->max_tes_threads - 1) << (brw->is_haswell ? HSW_DS_MAX_THREADS_SHIFT : GEN7_DS_MAX_THREADS_SHIFT); diff --git a/src/mesa/drivers/dri/i965/gen7_te_state.c b/src/mesa/drivers/dri/i965/gen7_te_state.c index d525318f71c..e56fdcf4e89 100644 --- a/src/mesa/drivers/dri/i965/gen7_te_state.c +++ b/src/mesa/drivers/dri/i965/gen7_te_state.c @@ -32,7 +32,8 @@ upload_te_state(struct brw_context *brw) /* BRW_NEW_TESS_PROGRAMS */ bool active = brw->tess_eval_program; - const struct brw_tes_prog_data *tes_prog_data = brw->tes.prog_data; + const struct brw_tes_prog_data *tes_prog_data = + brw_tes_prog_data(brw->tes.base.prog_data); if (active) { BEGIN_BATCH(4); diff --git a/src/mesa/drivers/dri/i965/gen7_urb.c b/src/mesa/drivers/dri/i965/gen7_urb.c index d68fc04fef1..30ae87147eb 100644 --- a/src/mesa/drivers/dri/i965/gen7_urb.c +++ b/src/mesa/drivers/dri/i965/gen7_urb.c @@ -220,7 +220,9 @@ gen7_upload_urb(struct brw_context *brw, unsigned vs_size, unsigned hs_size = tess_present ? tcs_vue_prog_data->urb_entry_size : 1; unsigned hs_entry_size_bytes = hs_size * 64; /* BRW_NEW_TES_PROG_DATA */ - unsigned ds_size = tess_present ? brw->tes.prog_data->base.urb_entry_size : 1; + const struct brw_vue_prog_data *tes_vue_prog_data = + brw_vue_prog_data(brw->tes.base.prog_data); + unsigned ds_size = tess_present ? tes_vue_prog_data->urb_entry_size : 1; unsigned ds_entry_size_bytes = ds_size * 64; /* If we're just switching between programs with the same URB requirements, diff --git a/src/mesa/drivers/dri/i965/gen8_ds_state.c b/src/mesa/drivers/dri/i965/gen8_ds_state.c index f1df1305fb4..0ea145673b4 100644 --- a/src/mesa/drivers/dri/i965/gen8_ds_state.c +++ b/src/mesa/drivers/dri/i965/gen8_ds_state.c @@ -36,9 +36,11 @@ gen8_upload_ds_state(struct brw_context *brw) bool active = brw->tess_eval_program; /* BRW_NEW_TES_PROG_DATA */ - const struct brw_tes_prog_data *tes_prog_data = brw->tes.prog_data; - const struct brw_vue_prog_data *vue_prog_data = &tes_prog_data->base; - const struct brw_stage_prog_data *prog_data = &vue_prog_data->base; + const struct brw_stage_prog_data *prog_data = stage_state->prog_data; + const struct brw_vue_prog_data *vue_prog_data = + brw_vue_prog_data(stage_state->prog_data); + const struct brw_tes_prog_data *tes_prog_data = + brw_tes_prog_data(stage_state->prog_data); const int ds_pkt_len = brw->gen >= 9 ? 11 : 9; if (active) { |