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authorMarek Olšák <[email protected]>2016-11-13 17:30:54 +0100
committerMarek Olšák <[email protected]>2016-11-21 21:44:35 +0100
commitd2a56985d7b4b22d176c13d8601f98e18e44d3a1 (patch)
tree1989f3605b7ccb0d0d9c6fa14c3eb70884449f68 /src
parentfee71fec25efb9771a7c3fa15b120d4c816b59b5 (diff)
radeonsi: don't set vs.epilog.export_prim_id if TES is bound
there is no VS epilog in this case Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/radeonsi/si_state_shaders.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 9df8f47e624..72d0518c6bd 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -881,10 +881,10 @@ static inline void si_shader_selector_key(struct pipe_context *ctx,
key->as_ls = 1;
else if (sctx->gs_shader.cso)
key->as_es = 1;
-
- if (!sctx->gs_shader.cso && sctx->ps_shader.cso &&
- sctx->ps_shader.cso->info.uses_primid)
- key->part.vs.epilog.export_prim_id = 1;
+ else {
+ if (sctx->ps_shader.cso && sctx->ps_shader.cso->info.uses_primid)
+ key->part.vs.epilog.export_prim_id = 1;
+ }
break;
case PIPE_SHADER_TESS_CTRL:
key->part.tcs.epilog.prim_mode =