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authorKenneth Graunke <[email protected]>2014-06-24 16:33:56 -0700
committerKenneth Graunke <[email protected]>2014-06-26 11:50:34 -0700
commitdb184d43b0573c00d911ef9e98fbaab26ebd6466 (patch)
tree24e4f0f74353e7c3d29d3d12dd64fb0ee32b86d4 /src
parenta248b2a4ebb27832d6c8a40ce2b10134f8735b93 (diff)
i965: Add 2x MSAA support to the MCS allocation function.
2x MSAA also uses 8 bits, just like 4x. More bits are unused. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 58e09b74d95..e4d67b97420 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -1251,6 +1251,7 @@ intel_miptree_alloc_mcs(struct brw_context *brw,
*/
mesa_format format;
switch (num_samples) {
+ case 2:
case 4:
/* 8 bits/pixel are required for MCS data when using 4x MSAA (2 bits for
* each sample).