diff options
author | Anuj Phogat <[email protected]> | 2017-07-20 15:59:49 -0700 |
---|---|---|
committer | Anuj Phogat <[email protected]> | 2018-02-15 16:14:55 -0800 |
commit | bff24e2173543a0329347ad95be86c1db60f2f0e (patch) | |
tree | a68ed1360532c436864f335f61a38a1561138ec1 /src | |
parent | 0427bd4954acfd99c3b00b8a0993ca3c9e816d47 (diff) |
intel/isl/icl: Build and use gen11 surface state emit functions
Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>
Reviewed-by: Dylan Baker <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/intel/Android.isl.mk | 20 | ||||
-rw-r--r-- | src/intel/Makefile.isl.am | 4 | ||||
-rw-r--r-- | src/intel/Makefile.sources | 4 | ||||
-rw-r--r-- | src/intel/isl/isl.c | 3 | ||||
-rw-r--r-- | src/intel/isl/isl_priv.h | 3 | ||||
-rw-r--r-- | src/intel/isl/meson.build | 2 |
6 files changed, 35 insertions, 1 deletions
diff --git a/src/intel/Android.isl.mk b/src/intel/Android.isl.mk index 516ac3a2102..23cff55d251 100644 --- a/src/intel/Android.isl.mk +++ b/src/intel/Android.isl.mk @@ -180,6 +180,25 @@ include $(MESA_COMMON_MK) include $(BUILD_STATIC_LIBRARY) # --------------------------------------- +# Build libmesa_isl_gen11 +# --------------------------------------- + +include $(CLEAR_VARS) + +LOCAL_MODULE := libmesa_isl_gen11 + +LOCAL_SRC_FILES := $(ISL_GEN11_FILES) + +LOCAL_CFLAGS := -DGEN_VERSIONx10=110 + +LOCAL_C_INCLUDES := $(LIBISL_GENX_COMMON_INCLUDES) + +LOCAL_WHOLE_STATIC_LIBRARIES := libmesa_genxml + +include $(MESA_COMMON_MK) +include $(BUILD_STATIC_LIBRARY) + +# --------------------------------------- # Build libmesa_isl # --------------------------------------- @@ -207,6 +226,7 @@ LOCAL_WHOLE_STATIC_LIBRARIES := \ libmesa_isl_gen8 \ libmesa_isl_gen9 \ libmesa_isl_gen10 \ + libmesa_isl_gen11 \ libmesa_genxml # Autogenerated sources diff --git a/src/intel/Makefile.isl.am b/src/intel/Makefile.isl.am index 31273af36c0..9525f9e9905 100644 --- a/src/intel/Makefile.isl.am +++ b/src/intel/Makefile.isl.am @@ -28,6 +28,7 @@ ISL_GEN_LIBS = \ isl/libisl-gen8.la \ isl/libisl-gen9.la \ isl/libisl-gen10.la \ + isl/libisl-gen11.la \ $(NULL) noinst_LTLIBRARIES += $(ISL_GEN_LIBS) isl/libisl.la @@ -59,6 +60,9 @@ isl_libisl_gen9_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=90 isl_libisl_gen10_la_SOURCES = $(ISL_GEN10_FILES) isl_libisl_gen10_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=100 +isl_libisl_gen11_la_SOURCES = $(ISL_GEN11_FILES) +isl_libisl_gen11_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=110 + BUILT_SOURCES += $(ISL_GENERATED_FILES) isl/isl_format_layout.c: isl/gen_format_layout.py \ diff --git a/src/intel/Makefile.sources b/src/intel/Makefile.sources index 4c0240bdf17..22563cac6ac 100644 --- a/src/intel/Makefile.sources +++ b/src/intel/Makefile.sources @@ -203,6 +203,10 @@ ISL_GEN10_FILES = \ isl/isl_emit_depth_stencil.c \ isl/isl_surface_state.c +ISL_GEN11_FILES = \ + isl/isl_emit_depth_stencil.c \ + isl/isl_surface_state.c + ISL_GENERATED_FILES = \ isl/isl_format_layout.c diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c index f70ac22aac5..4dce0596d23 100644 --- a/src/intel/isl/isl.c +++ b/src/intel/isl/isl.c @@ -1778,6 +1778,9 @@ isl_surf_get_ccs_surf(const struct isl_device *dev, case 10: \ isl_gen10_##func(__VA_ARGS__); \ break; \ + case 11: \ + isl_gen11_##func(__VA_ARGS__); \ + break; \ default: \ assert(!"Unknown hardware generation"); \ } diff --git a/src/intel/isl/isl_priv.h b/src/intel/isl/isl_priv.h index 2122e7cb75f..b86167bb3af 100644 --- a/src/intel/isl/isl_priv.h +++ b/src/intel/isl/isl_priv.h @@ -190,6 +190,9 @@ isl_extent3d_el_to_sa(enum isl_format fmt, struct isl_extent3d extent_el) # define genX(x) gen10_##x # include "isl_genX_priv.h" # undef genX +# define genX(x) gen11_##x +# include "isl_genX_priv.h" +# undef genX #endif #endif /* ISL_PRIV_H */ diff --git a/src/intel/isl/meson.build b/src/intel/isl/meson.build index 0838c32af32..36b8b8ffa20 100644 --- a/src/intel/isl/meson.build +++ b/src/intel/isl/meson.build @@ -51,7 +51,7 @@ isl_gen9_files = files( isl_gen_libs = [] foreach g : [['40', isl_gen4_files], ['50', []], ['60', isl_gen6_files], ['70', isl_gen7_files], ['75', []], ['80', isl_gen8_files], - ['90', isl_gen9_files], ['100', []]] + ['90', isl_gen9_files], ['100', []], ['110', []]] _gen = g[0] isl_gen_libs += static_library( 'libisl_gen@0@'.format(_gen), |