ilo: add GEN_EXTRACT() and GEN_SHIFT32()

They replace READ() and SET_FIELD() that we have been using.

4 files changed, 142 insertions, 133 deletions

diff --git a/src/gallium/drivers/ilo/genhw/genhw.h b/src/gallium/drivers/ilo/genhw/genhw.h
index d341ede8d15..126a8b5d3a9 100644
--- a/src/gallium/drivers/ilo/genhw/genhw.h
+++ b/src/gallium/drivers/ilo/genhw/genhw.h
@@ -53,6 +53,18 @@
 #define GEN7_RENDER_CMD(subtype, op) GEN_RENDER_CMD(subtype, GEN7, op)
 #define GEN75_RENDER_CMD(subtype, op) GEN_RENDER_CMD(subtype, GEN75, op)
 
+#define GEN_EXTRACT(bits, field) (((bits) & field ## __MASK) >> field ## __SHIFT)
+#define GEN_SHIFT32(bits, field) gen_shift32(bits, field ## __MASK, field ## __SHIFT)
+
+static inline uint32_t
+gen_shift32(uint32_t bits, uint32_t mask, int shift)
+{
+   bits <<= shift;
+
+   assert((bits & mask) == bits);
+   return bits & mask;
+}
+
 static inline bool
 gen_is_snb(int devid)
 {
diff --git a/src/gallium/drivers/ilo/ilo_builder_decode.c b/src/gallium/drivers/ilo/ilo_builder_decode.c
index eaa9efaf26a..404182ef5e1 100644
--- a/src/gallium/drivers/ilo/ilo_builder_decode.c
+++ b/src/gallium/drivers/ilo/ilo_builder_decode.c
@@ -32,8 +32,6 @@
 #include "intel_winsys.h"
 #include "ilo_builder.h"
 
-#define READ(dw, field) (((dw) & field ## __MASK) >> field ## __SHIFT)
-
 static const uint32_t *
 writer_pointer(const struct ilo_builder *builder,
                enum ilo_builder_writer_type which,
@@ -236,13 +234,13 @@ writer_decode_scissor_rect(const struct ilo_builder *builder,
 
       dw = writer_dw(builder, which, offset, 0, "SCISSOR%d", i);
       ilo_printf("xmin %d, ymin %d\n",
-            READ(dw, GEN6_SCISSOR_DW0_MIN_X),
-            READ(dw, GEN6_SCISSOR_DW0_MIN_Y));
+            GEN_EXTRACT(dw, GEN6_SCISSOR_DW0_MIN_X),
+            GEN_EXTRACT(dw, GEN6_SCISSOR_DW0_MIN_Y));
 
       dw = writer_dw(builder, which, offset, 1, "SCISSOR%d", i);
       ilo_printf("xmax %d, ymax %d\n",
-            READ(dw, GEN6_SCISSOR_DW1_MAX_X),
-            READ(dw, GEN6_SCISSOR_DW1_MAX_Y));
+            GEN_EXTRACT(dw, GEN6_SCISSOR_DW1_MAX_X),
+            GEN_EXTRACT(dw, GEN6_SCISSOR_DW1_MAX_Y));
 
       offset += state_size;
    }
@@ -281,10 +279,10 @@ writer_decode_color_calc(const struct ilo_builder *builder,
    dw = writer_dw(builder, which, item->offset, 0, "CC");
    ilo_printf("alpha test format %s, round disable %d, "
               "stencil ref %d, bf stencil ref %d\n",
-	      READ(dw, GEN6_CC_DW0_ALPHATEST) ? "FLOAT32" : "UNORM8",
+	      GEN_EXTRACT(dw, GEN6_CC_DW0_ALPHATEST) ? "FLOAT32" : "UNORM8",
 	      (bool) (dw & GEN6_CC_DW0_ROUND_DISABLE_DISABLE),
-	      READ(dw, GEN6_CC_DW0_STENCIL0_REF),
-	      READ(dw, GEN6_CC_DW0_STENCIL1_REF));
+	      GEN_EXTRACT(dw, GEN6_CC_DW0_STENCIL0_REF),
+	      GEN_EXTRACT(dw, GEN6_CC_DW0_STENCIL1_REF));
 
    writer_dw(builder, which, item->offset, 1, "CC\n");
 
@@ -311,18 +309,18 @@ writer_decode_depth_stencil(const struct ilo_builder *builder,
    dw = writer_dw(builder, which, item->offset, 0, "D_S");
    ilo_printf("stencil %sable, func %d, write %sable\n",
          (dw & GEN6_ZS_DW0_STENCIL_TEST_ENABLE) ? "en" : "dis",
-         READ(dw, GEN6_ZS_DW0_STENCIL0_FUNC),
+         GEN_EXTRACT(dw, GEN6_ZS_DW0_STENCIL0_FUNC),
          (dw & GEN6_ZS_DW0_STENCIL_WRITE_ENABLE) ? "en" : "dis");
 
    dw = writer_dw(builder, which, item->offset, 1, "D_S");
    ilo_printf("stencil test mask 0x%x, write mask 0x%x\n",
-         READ(dw, GEN6_ZS_DW1_STENCIL0_VALUEMASK),
-         READ(dw, GEN6_ZS_DW1_STENCIL0_WRITEMASK));
+         GEN_EXTRACT(dw, GEN6_ZS_DW1_STENCIL0_VALUEMASK),
+         GEN_EXTRACT(dw, GEN6_ZS_DW1_STENCIL0_WRITEMASK));
 
    dw = writer_dw(builder, which, item->offset, 2, "D_S");
    ilo_printf("depth test %sable, func %d, write %sable\n",
          (dw & GEN6_ZS_DW2_DEPTH_TEST_ENABLE) ? "en" : "dis",
-         READ(dw, GEN6_ZS_DW2_DEPTH_FUNC),
+         GEN_EXTRACT(dw, GEN6_ZS_DW2_DEPTH_FUNC),
          (dw & GEN6_ZS_DW2_DEPTH_WRITE_ENABLE) ? "en" : "dis");
 }
 
@@ -380,9 +378,9 @@ writer_decode_surface_gen7(const struct ilo_builder *builder,
 
    dw = writer_dw(builder, which, item->offset, 0, "SURF");
    ilo_printf("type 0x%x, format 0x%x, tiling %d, %s array\n",
-         READ(dw, GEN7_SURFACE_DW0_TYPE),
-         READ(dw, GEN7_SURFACE_DW0_FORMAT),
-         READ(dw, GEN7_SURFACE_DW0_TILING),
+         GEN_EXTRACT(dw, GEN7_SURFACE_DW0_TYPE),
+         GEN_EXTRACT(dw, GEN7_SURFACE_DW0_FORMAT),
+         GEN_EXTRACT(dw, GEN7_SURFACE_DW0_TILING),
          (dw & GEN7_SURFACE_DW0_IS_ARRAY) ? "is" : "not");
 
    writer_dw(builder, which, item->offset, 1, "SURF");
@@ -390,25 +388,25 @@ writer_decode_surface_gen7(const struct ilo_builder *builder,
 
    dw = writer_dw(builder, which, item->offset, 2, "SURF");
    ilo_printf("%dx%d size\n",
-         READ(dw, GEN7_SURFACE_DW2_WIDTH),
-         READ(dw, GEN7_SURFACE_DW2_HEIGHT));
+         GEN_EXTRACT(dw, GEN7_SURFACE_DW2_WIDTH),
+         GEN_EXTRACT(dw, GEN7_SURFACE_DW2_HEIGHT));
 
    dw = writer_dw(builder, which, item->offset, 3, "SURF");
    ilo_printf("depth %d, pitch %d\n",
-         READ(dw, GEN7_SURFACE_DW3_DEPTH),
-         READ(dw, GEN7_SURFACE_DW3_PITCH));
+         GEN_EXTRACT(dw, GEN7_SURFACE_DW3_DEPTH),
+         GEN_EXTRACT(dw, GEN7_SURFACE_DW3_PITCH));
 
    dw = writer_dw(builder, which, item->offset, 4, "SURF");
    ilo_printf("min array element %d, array extent %d\n",
-         READ(dw, GEN7_SURFACE_DW4_MIN_ARRAY_ELEMENT),
-         READ(dw, GEN7_SURFACE_DW4_RT_VIEW_EXTENT));
+         GEN_EXTRACT(dw, GEN7_SURFACE_DW4_MIN_ARRAY_ELEMENT),
+         GEN_EXTRACT(dw, GEN7_SURFACE_DW4_RT_VIEW_EXTENT));
 
    dw = writer_dw(builder, which, item->offset, 5, "SURF");
    ilo_printf("mip base %d, mips %d, x,y offset: %d,%d\n",
-         READ(dw, GEN7_SURFACE_DW5_MIN_LOD),
-         READ(dw, GEN7_SURFACE_DW5_MIP_COUNT_LOD),
-         READ(dw, GEN7_SURFACE_DW5_X_OFFSET),
-         READ(dw, GEN7_SURFACE_DW5_Y_OFFSET));
+         GEN_EXTRACT(dw, GEN7_SURFACE_DW5_MIN_LOD),
+         GEN_EXTRACT(dw, GEN7_SURFACE_DW5_MIP_COUNT_LOD),
+         GEN_EXTRACT(dw, GEN7_SURFACE_DW5_X_OFFSET),
+         GEN_EXTRACT(dw, GEN7_SURFACE_DW5_Y_OFFSET));
 
    writer_dw(builder, which, item->offset, 6, "SURF\n");
    writer_dw(builder, which, item->offset, 7, "SURF\n");
@@ -423,31 +421,31 @@ writer_decode_surface_gen6(const struct ilo_builder *builder,
 
    dw = writer_dw(builder, which, item->offset, 0, "SURF");
    ilo_printf("type 0x%x, format 0x%x\n",
-         READ(dw, GEN6_SURFACE_DW0_TYPE),
-         READ(dw, GEN6_SURFACE_DW0_FORMAT));
+         GEN_EXTRACT(dw, GEN6_SURFACE_DW0_TYPE),
+         GEN_EXTRACT(dw, GEN6_SURFACE_DW0_FORMAT));
 
    writer_dw(builder, which, item->offset, 1, "SURF");
    ilo_printf("offset\n");
 
    dw = writer_dw(builder, which, item->offset, 2, "SURF");
    ilo_printf("%dx%d size, %d mips\n",
-         READ(dw, GEN6_SURFACE_DW2_WIDTH),
-         READ(dw, GEN6_SURFACE_DW2_HEIGHT),
-         READ(dw, GEN6_SURFACE_DW2_MIP_COUNT_LOD));
+         GEN_EXTRACT(dw, GEN6_SURFACE_DW2_WIDTH),
+         GEN_EXTRACT(dw, GEN6_SURFACE_DW2_HEIGHT),
+         GEN_EXTRACT(dw, GEN6_SURFACE_DW2_MIP_COUNT_LOD));
 
    dw = writer_dw(builder, which, item->offset, 3, "SURF");
    ilo_printf("pitch %d, tiling %d\n",
-         READ(dw, GEN6_SURFACE_DW3_PITCH),
-         READ(dw, GEN6_SURFACE_DW3_TILING));
+         GEN_EXTRACT(dw, GEN6_SURFACE_DW3_PITCH),
+         GEN_EXTRACT(dw, GEN6_SURFACE_DW3_TILING));
 
    dw = writer_dw(builder, which, item->offset, 4, "SURF");
    ilo_printf("mip base %d\n",
-         READ(dw, GEN6_SURFACE_DW4_MIN_LOD));
+         GEN_EXTRACT(dw, GEN6_SURFACE_DW4_MIN_LOD));
 
    dw = writer_dw(builder, which, item->offset, 5, "SURF");
    ilo_printf("x,y offset: %d,%d\n",
-         READ(dw, GEN6_SURFACE_DW5_X_OFFSET),
-         READ(dw, GEN6_SURFACE_DW5_Y_OFFSET));
+         GEN_EXTRACT(dw, GEN6_SURFACE_DW5_X_OFFSET),
+         GEN_EXTRACT(dw, GEN6_SURFACE_DW5_Y_OFFSET));
 }
 
 static void
diff --git a/src/gallium/drivers/ilo/ilo_gpe_gen7.c b/src/gallium/drivers/ilo/ilo_gpe_gen7.c
index 6f7399b7f42..f472df292c8 100644
--- a/src/gallium/drivers/ilo/ilo_gpe_gen7.c
+++ b/src/gallium/drivers/ilo/ilo_gpe_gen7.c
@@ -33,8 +33,6 @@
 #include "ilo_shader.h"
 #include "ilo_gpe_gen7.h"
 
-#define SET_FIELD(value, field) (((value) << field ## __SHIFT) & field ## __MASK)
-
 void
 ilo_gpe_init_gs_cso_gen7(const struct ilo_dev_info *dev,
                          const struct ilo_shader_state *gs,
@@ -285,10 +283,10 @@ ilo_gpe_init_view_surface_null_gen7(const struct ilo_dev_info *dev,
 
    dw[1] = 0;
 
-   dw[2] = SET_FIELD(height - 1, GEN7_SURFACE_DW2_HEIGHT) |
-           SET_FIELD(width  - 1, GEN7_SURFACE_DW2_WIDTH);
+   dw[2] = GEN_SHIFT32(height - 1, GEN7_SURFACE_DW2_HEIGHT) |
+           GEN_SHIFT32(width  - 1, GEN7_SURFACE_DW2_WIDTH);
 
-   dw[3] = SET_FIELD(depth - 1, GEN7_SURFACE_DW3_DEPTH);
+   dw[3] = GEN_SHIFT32(depth - 1, GEN7_SURFACE_DW3_DEPTH);
 
    dw[4] = 0;
    dw[5] = level;
@@ -401,10 +399,10 @@ ilo_gpe_init_view_surface_for_buffer_gen7(const struct ilo_dev_info *dev,
 
    dw[1] = offset;
 
-   dw[2] = SET_FIELD(height, GEN7_SURFACE_DW2_HEIGHT) |
-           SET_FIELD(width, GEN7_SURFACE_DW2_WIDTH);
+   dw[2] = GEN_SHIFT32(height, GEN7_SURFACE_DW2_HEIGHT) |
+           GEN_SHIFT32(width, GEN7_SURFACE_DW2_WIDTH);
 
-   dw[3] = SET_FIELD(depth, GEN7_SURFACE_DW3_DEPTH) |
+   dw[3] = GEN_SHIFT32(depth, GEN7_SURFACE_DW3_DEPTH) |
            pitch;
 
    dw[4] = 0;
@@ -414,10 +412,10 @@ ilo_gpe_init_view_surface_for_buffer_gen7(const struct ilo_dev_info *dev,
    dw[7] = 0;
 
    if (dev->gen >= ILO_GEN(7.5)) {
-      dw[7] |= SET_FIELD(GEN75_SCS_RED,   GEN75_SURFACE_DW7_SCS_R) |
-               SET_FIELD(GEN75_SCS_GREEN, GEN75_SURFACE_DW7_SCS_G) |
-               SET_FIELD(GEN75_SCS_BLUE,  GEN75_SURFACE_DW7_SCS_B) |
-               SET_FIELD(GEN75_SCS_ALPHA, GEN75_SURFACE_DW7_SCS_A);
+      dw[7] |= GEN_SHIFT32(GEN75_SCS_RED,   GEN75_SURFACE_DW7_SCS_R) |
+               GEN_SHIFT32(GEN75_SCS_GREEN, GEN75_SURFACE_DW7_SCS_G) |
+               GEN_SHIFT32(GEN75_SCS_BLUE,  GEN75_SURFACE_DW7_SCS_B) |
+               GEN_SHIFT32(GEN75_SCS_ALPHA, GEN75_SURFACE_DW7_SCS_A);
    }
 
    /* do not increment reference count */
@@ -591,10 +589,10 @@ ilo_gpe_init_view_surface_for_texture_gen7(const struct ilo_dev_info *dev,
 
    dw[1] = 0;
 
-   dw[2] = SET_FIELD(height - 1, GEN7_SURFACE_DW2_HEIGHT) |
-           SET_FIELD(width - 1, GEN7_SURFACE_DW2_WIDTH);
+   dw[2] = GEN_SHIFT32(height - 1, GEN7_SURFACE_DW2_HEIGHT) |
+           GEN_SHIFT32(width - 1, GEN7_SURFACE_DW2_WIDTH);
 
-   dw[3] = SET_FIELD(depth - 1, GEN7_SURFACE_DW3_DEPTH) |
+   dw[3] = GEN_SHIFT32(depth - 1, GEN7_SURFACE_DW3_DEPTH) |
            (pitch - 1);
 
    dw[4] = first_layer << 18 |
@@ -620,17 +618,17 @@ ilo_gpe_init_view_surface_for_texture_gen7(const struct ilo_dev_info *dev,
    else
       dw[4] |= GEN7_SURFACE_DW4_MULTISAMPLECOUNT_1;
 
-   dw[5] = SET_FIELD(first_level, GEN7_SURFACE_DW5_MIN_LOD) |
+   dw[5] = GEN_SHIFT32(first_level, GEN7_SURFACE_DW5_MIN_LOD) |
            lod;
 
    dw[6] = 0;
    dw[7] = 0;
 
    if (dev->gen >= ILO_GEN(7.5)) {
-      dw[7] |= SET_FIELD(GEN75_SCS_RED,   GEN75_SURFACE_DW7_SCS_R) |
-               SET_FIELD(GEN75_SCS_GREEN, GEN75_SURFACE_DW7_SCS_G) |
-               SET_FIELD(GEN75_SCS_BLUE,  GEN75_SURFACE_DW7_SCS_B) |
-               SET_FIELD(GEN75_SCS_ALPHA, GEN75_SURFACE_DW7_SCS_A);
+      dw[7] |= GEN_SHIFT32(GEN75_SCS_RED,   GEN75_SURFACE_DW7_SCS_R) |
+               GEN_SHIFT32(GEN75_SCS_GREEN, GEN75_SURFACE_DW7_SCS_G) |
+               GEN_SHIFT32(GEN75_SCS_BLUE,  GEN75_SURFACE_DW7_SCS_B) |
+               GEN_SHIFT32(GEN75_SCS_ALPHA, GEN75_SURFACE_DW7_SCS_A);
    }
 
    /* do not increment reference count */
diff --git a/src/gallium/drivers/ilo/shader/toy_compiler_disasm.c b/src/gallium/drivers/ilo/shader/toy_compiler_disasm.c
index 63fc5e49ade..751fccbf11b 100644
--- a/src/gallium/drivers/ilo/shader/toy_compiler_disasm.c
+++ b/src/gallium/drivers/ilo/shader/toy_compiler_disasm.c
@@ -32,8 +32,6 @@
 #define DISASM_PRINTER_BUFFER_SIZE 256
 #define DISASM_PRINTER_COLUMN_WIDTH 16
 
-#define READ(dw, field) (((dw) & field ## __MASK) >> field ## __SHIFT)
-
 struct disasm_printer {
    char buf[DISASM_PRINTER_BUFFER_SIZE];
    int len;
@@ -185,7 +183,7 @@ static const struct {
 static void
 disasm_inst_decode_dw0_gen6(struct disasm_inst *inst, uint32_t dw0)
 {
-   inst->opcode = READ(dw0, GEN6_INST_OPCODE);
+   inst->opcode = GEN_EXTRACT(dw0, GEN6_INST_OPCODE);
 
    switch (inst->opcode) {
    case GEN6_OPCODE_IF:
@@ -213,27 +211,27 @@ disasm_inst_decode_dw0_gen6(struct disasm_inst *inst, uint32_t dw0)
       break;
    }
 
-   inst->access_mode = READ(dw0, GEN6_INST_ACCESSMODE);
-   inst->mask_ctrl = READ(dw0, GEN6_INST_MASKCTRL);
-   inst->dep_ctrl = READ(dw0, GEN6_INST_DEPCTRL);
-   inst->qtr_ctrl = READ(dw0, GEN6_INST_QTRCTRL);
-   inst->thread_ctrl = READ(dw0, GEN6_INST_THREADCTRL);
-   inst->pred_ctrl = READ(dw0, GEN6_INST_PREDCTRL);
+   inst->access_mode = GEN_EXTRACT(dw0, GEN6_INST_ACCESSMODE);
+   inst->mask_ctrl = GEN_EXTRACT(dw0, GEN6_INST_MASKCTRL);
+   inst->dep_ctrl = GEN_EXTRACT(dw0, GEN6_INST_DEPCTRL);
+   inst->qtr_ctrl = GEN_EXTRACT(dw0, GEN6_INST_QTRCTRL);
+   inst->thread_ctrl = GEN_EXTRACT(dw0, GEN6_INST_THREADCTRL);
+   inst->pred_ctrl = GEN_EXTRACT(dw0, GEN6_INST_PREDCTRL);
 
    inst->pred_inv = (bool) (dw0 & GEN6_INST_PREDINV);
 
-   inst->exec_size = READ(dw0, GEN6_INST_EXECSIZE);
+   inst->exec_size = GEN_EXTRACT(dw0, GEN6_INST_EXECSIZE);
 
    switch (inst->opcode) {
    case GEN6_OPCODE_SEND:
    case GEN6_OPCODE_SENDC:
-      inst->sfid = READ(dw0, GEN6_INST_SFID);
+      inst->sfid = GEN_EXTRACT(dw0, GEN6_INST_SFID);
       break;
    case GEN6_OPCODE_MATH:
-      inst->fc = READ(dw0, GEN6_INST_FC);
+      inst->fc = GEN_EXTRACT(dw0, GEN6_INST_FC);
       break;
    default:
-      inst->cond_modifier = READ(dw0, GEN6_INST_CONDMODIFIER);
+      inst->cond_modifier = GEN_EXTRACT(dw0, GEN6_INST_CONDMODIFIER);
       break;
    }
 
@@ -252,12 +250,12 @@ disasm_inst_jip_in_dw1_high_gen6(const struct disasm_inst *inst)
 static void
 disasm_inst_decode_dw1_gen6(struct disasm_inst *inst, uint32_t dw1)
 {
-   inst->dst.base.file = READ(dw1, GEN6_INST_DST_FILE);
-   inst->dst.base.type = READ(dw1, GEN6_INST_DST_TYPE);
-   inst->src0.base.file = READ(dw1, GEN6_INST_SRC0_FILE);
-   inst->src0.base.type = READ(dw1, GEN6_INST_SRC0_TYPE);
-   inst->src1.base.file = READ(dw1, GEN6_INST_SRC1_FILE);
-   inst->src1.base.type = READ(dw1, GEN6_INST_SRC1_TYPE);
+   inst->dst.base.file = GEN_EXTRACT(dw1, GEN6_INST_DST_FILE);
+   inst->dst.base.type = GEN_EXTRACT(dw1, GEN6_INST_DST_TYPE);
+   inst->src0.base.file = GEN_EXTRACT(dw1, GEN6_INST_SRC0_FILE);
+   inst->src0.base.type = GEN_EXTRACT(dw1, GEN6_INST_SRC0_TYPE);
+   inst->src1.base.file = GEN_EXTRACT(dw1, GEN6_INST_SRC1_FILE);
+   inst->src1.base.type = GEN_EXTRACT(dw1, GEN6_INST_SRC1_TYPE);
 
    if (inst->dev->gen >= ILO_GEN(7))
       inst->nib_ctrl = (bool) (dw1 & GEN7_INST_NIBCTRL);
@@ -267,34 +265,36 @@ disasm_inst_decode_dw1_gen6(struct disasm_inst *inst, uint32_t dw1)
       return;
    }
 
-   inst->dst.base.addr_mode = READ(dw1, GEN6_INST_DST_ADDRMODE);
+   inst->dst.base.addr_mode = GEN_EXTRACT(dw1, GEN6_INST_DST_ADDRMODE);
 
    if (inst->dst.base.addr_mode == GEN6_ADDRMODE_DIRECT) {
-      inst->dst.base.reg = READ(dw1, GEN6_INST_DST_REG);
+      inst->dst.base.reg = GEN_EXTRACT(dw1, GEN6_INST_DST_REG);
 
       if (inst->access_mode == GEN6_ALIGN_1) {
-         inst->dst.base.subreg = READ(dw1, GEN6_INST_DST_SUBREG);
+         inst->dst.base.subreg = GEN_EXTRACT(dw1, GEN6_INST_DST_SUBREG);
       } else {
-         inst->dst.base.subreg = READ(dw1, GEN6_INST_DST_SUBREG_ALIGN16) <<
+         inst->dst.base.subreg =
+            GEN_EXTRACT(dw1, GEN6_INST_DST_SUBREG_ALIGN16) <<
             GEN6_INST_DST_SUBREG_ALIGN16__SHR;
       }
    } else {
-      inst->dst.base.addr_subreg = READ(dw1, GEN6_INST_DST_ADDR_SUBREG);
+      inst->dst.base.addr_subreg = GEN_EXTRACT(dw1, GEN6_INST_DST_ADDR_SUBREG);
 
       if (inst->access_mode == GEN6_ALIGN_1) {
-         inst->dst.base.addr_imm = READ(dw1, GEN6_INST_DST_ADDR_IMM);
+         inst->dst.base.addr_imm = GEN_EXTRACT(dw1, GEN6_INST_DST_ADDR_IMM);
       } else {
-         inst->dst.base.addr_imm = READ(dw1, GEN6_INST_DST_ADDR_IMM_ALIGN16) <<
+         inst->dst.base.addr_imm = GEN_EXTRACT(dw1,
+               GEN6_INST_DST_ADDR_IMM_ALIGN16) <<
             GEN6_INST_DST_ADDR_IMM_ALIGN16__SHR;
       }
    }
 
-   inst->dst.horz_stride = READ(dw1, GEN6_INST_DST_HORZSTRIDE);
+   inst->dst.horz_stride = GEN_EXTRACT(dw1, GEN6_INST_DST_HORZSTRIDE);
 
    if (inst->access_mode == GEN6_ALIGN_1)
       inst->dst.writemask = 0xf;
    else
-      inst->dst.writemask = READ(dw1, GEN6_INST_DST_WRITEMASK);
+      inst->dst.writemask = GEN_EXTRACT(dw1, GEN6_INST_DST_WRITEMASK);
 }
 
 static void
@@ -304,9 +304,9 @@ disasm_inst_decode_dw2_dw3_gen6(struct disasm_inst *inst,
    int count, i;
 
    if (inst->dev->gen >= ILO_GEN(7))
-      inst->flag_reg = READ(dw2, GEN7_INST_FLAG_REG);
+      inst->flag_reg = GEN_EXTRACT(dw2, GEN7_INST_FLAG_REG);
 
-   inst->flag_subreg = READ(dw2, GEN6_INST_FLAG_SUBREG);
+   inst->flag_subreg = GEN_EXTRACT(dw2, GEN6_INST_FLAG_SUBREG);
 
    if (inst->src0.base.file == GEN6_FILE_IMM ||
        inst->src1.base.file == GEN6_FILE_IMM) {
@@ -321,33 +321,34 @@ disasm_inst_decode_dw2_dw3_gen6(struct disasm_inst *inst,
       struct disasm_src_operand *src = (i == 0) ? &inst->src0 : &inst->src1;
       const uint32_t dw = (i == 0) ? dw2 : dw3;
 
-      src->base.addr_mode = READ(dw, GEN6_INST_SRC_ADDRMODE);
+      src->base.addr_mode = GEN_EXTRACT(dw, GEN6_INST_SRC_ADDRMODE);
 
       if (src->base.addr_mode == GEN6_ADDRMODE_DIRECT) {
-         src->base.reg = READ(dw, GEN6_INST_SRC_REG);
+         src->base.reg = GEN_EXTRACT(dw, GEN6_INST_SRC_REG);
 
          if (inst->access_mode == GEN6_ALIGN_1) {
-            src->base.subreg = READ(dw, GEN6_INST_SRC_SUBREG);
+            src->base.subreg = GEN_EXTRACT(dw, GEN6_INST_SRC_SUBREG);
          } else {
-            src->base.subreg = READ(dw, GEN6_INST_SRC_SUBREG_ALIGN16) <<
+            src->base.subreg = GEN_EXTRACT(dw, GEN6_INST_SRC_SUBREG_ALIGN16) <<
                GEN6_INST_SRC_SUBREG_ALIGN16__SHR;
          }
       } else {
-         src->base.addr_subreg = READ(dw, GEN6_INST_SRC_ADDR_SUBREG);
+         src->base.addr_subreg = GEN_EXTRACT(dw, GEN6_INST_SRC_ADDR_SUBREG);
 
          if (inst->access_mode == GEN6_ALIGN_1) {
-            src->base.addr_imm = READ(dw, GEN6_INST_SRC_ADDR_IMM);
+            src->base.addr_imm = GEN_EXTRACT(dw, GEN6_INST_SRC_ADDR_IMM);
          } else {
-            src->base.addr_imm = READ(dw, GEN6_INST_SRC_ADDR_IMM_ALIGN16) <<
+            src->base.addr_imm =
+               GEN_EXTRACT(dw, GEN6_INST_SRC_ADDR_IMM_ALIGN16) <<
                GEN6_INST_SRC_ADDR_IMM_ALIGN16__SHR;
          }
       }
 
-      src->vert_stride = READ(dw, GEN6_INST_SRC_VERTSTRIDE);
+      src->vert_stride = GEN_EXTRACT(dw, GEN6_INST_SRC_VERTSTRIDE);
 
       if (inst->access_mode == GEN6_ALIGN_1) {
-         src->width = READ(dw, GEN6_INST_SRC_WIDTH);
-         src->horz_stride = READ(dw, GEN6_INST_SRC_HORZSTRIDE);
+         src->width = GEN_EXTRACT(dw, GEN6_INST_SRC_WIDTH);
+         src->horz_stride = GEN_EXTRACT(dw, GEN6_INST_SRC_HORZSTRIDE);
 
          src->swizzle_x = GEN6_SWIZZLE_X;
          src->swizzle_y = GEN6_SWIZZLE_Y;
@@ -357,10 +358,10 @@ disasm_inst_decode_dw2_dw3_gen6(struct disasm_inst *inst,
          src->width = GEN6_WIDTH_4;
          src->horz_stride = GEN6_HORZSTRIDE_1;
 
-         src->swizzle_x = READ(dw, GEN6_INST_SRC_SWIZZLE_X);
-         src->swizzle_y = READ(dw, GEN6_INST_SRC_SWIZZLE_Y);
-         src->swizzle_z = READ(dw, GEN6_INST_SRC_SWIZZLE_Z);
-         src->swizzle_w = READ(dw, GEN6_INST_SRC_SWIZZLE_W);
+         src->swizzle_x = GEN_EXTRACT(dw, GEN6_INST_SRC_SWIZZLE_X);
+         src->swizzle_y = GEN_EXTRACT(dw, GEN6_INST_SRC_SWIZZLE_Y);
+         src->swizzle_z = GEN_EXTRACT(dw, GEN6_INST_SRC_SWIZZLE_Z);
+         src->swizzle_w = GEN_EXTRACT(dw, GEN6_INST_SRC_SWIZZLE_W);
       }
 
       src->negate = (bool) (dw & GEN6_INST_SRC_NEGATE);
@@ -378,17 +379,17 @@ disasm_inst_decode_3src_dw1_gen6(struct disasm_inst *inst, uint32_t dw1)
       [GEN7_TYPE_DF_3SRC]  = GEN7_TYPE_DF,
    };
 
-   inst->flag_subreg = READ(dw1, GEN6_3SRC_FLAG_SUBREG);
+   inst->flag_subreg = GEN_EXTRACT(dw1, GEN6_3SRC_FLAG_SUBREG);
 
    if (inst->dev->gen >= ILO_GEN(7)) {
       inst->nib_ctrl = (bool) (dw1 & GEN7_3SRC_NIBCTRL);
-      inst->flag_reg = READ(dw1, GEN7_3SRC_FLAG_REG);
+      inst->flag_reg = GEN_EXTRACT(dw1, GEN7_3SRC_FLAG_REG);
 
       inst->dst.base.file = GEN6_FILE_GRF;
-      inst->dst.base.type = READ(dw1, GEN7_3SRC_DST_TYPE);
+      inst->dst.base.type = GEN_EXTRACT(dw1, GEN7_3SRC_DST_TYPE);
       inst->dst.base.type = type_mapping[inst->dst.base.type];
 
-      inst->src0.base.type = READ(dw1, GEN7_3SRC_SRC_TYPE);
+      inst->src0.base.type = GEN_EXTRACT(dw1, GEN7_3SRC_SRC_TYPE);
       inst->src0.base.type = type_mapping[inst->src0.base.type];
 
       inst->src1.base.type = inst->src0.base.type;
@@ -404,12 +405,12 @@ disasm_inst_decode_3src_dw1_gen6(struct disasm_inst *inst, uint32_t dw1)
    }
 
    inst->dst.base.addr_mode = GEN6_ADDRMODE_DIRECT;
-   inst->dst.base.reg = READ(dw1, GEN6_3SRC_DST_REG);
-   inst->dst.base.subreg = READ(dw1, GEN6_3SRC_DST_SUBREG) <<
+   inst->dst.base.reg = GEN_EXTRACT(dw1, GEN6_3SRC_DST_REG);
+   inst->dst.base.subreg = GEN_EXTRACT(dw1, GEN6_3SRC_DST_SUBREG) <<
       GEN6_3SRC_DST_SUBREG__SHR;
 
    inst->dst.horz_stride = GEN6_HORZSTRIDE_1;
-   inst->dst.writemask = READ(dw1, GEN6_3SRC_DST_WRITEMASK);
+   inst->dst.writemask = GEN_EXTRACT(dw1, GEN6_3SRC_DST_WRITEMASK);
 
    inst->src0.base.file = GEN6_FILE_GRF;
    inst->src0.negate = (bool) (dw1 & GEN6_3SRC_SRC0_NEGATE);
@@ -433,13 +434,13 @@ disasm_inst_decode_3src_dw2_dw3_gen6(struct disasm_inst *inst,
       struct disasm_src_operand *src = (i == 0) ? &inst->src0 :
                                        (i == 1) ? &inst->src1 :
                                        &inst->u.src2;
-      const uint32_t dw = (i == 0) ? READ(qw, GEN6_3SRC_SRC_0) :
-                          (i == 1) ? READ(qw, GEN6_3SRC_SRC_1) :
-                          READ(qw, GEN6_3SRC_SRC_2);
+      const uint32_t dw = (i == 0) ? GEN_EXTRACT(qw, GEN6_3SRC_SRC_0) :
+                          (i == 1) ? GEN_EXTRACT(qw, GEN6_3SRC_SRC_1) :
+                          GEN_EXTRACT(qw, GEN6_3SRC_SRC_2);
 
       src->base.addr_mode = GEN6_ADDRMODE_DIRECT;
-      src->base.reg = READ(dw, GEN6_3SRC_SRC_REG);
-      src->base.subreg = READ(dw, GEN6_3SRC_SRC_SUBREG) <<
+      src->base.reg = GEN_EXTRACT(dw, GEN6_3SRC_SRC_REG);
+      src->base.subreg = GEN_EXTRACT(dw, GEN6_3SRC_SRC_SUBREG) <<
          GEN6_3SRC_SRC_SUBREG__SHR;
 
       if (dw & GEN6_3SRC_SRC_REPCTRL) {
@@ -452,10 +453,10 @@ disasm_inst_decode_3src_dw2_dw3_gen6(struct disasm_inst *inst,
          src->horz_stride = GEN6_HORZSTRIDE_1;
       }
 
-      src->swizzle_x = READ(dw, GEN6_3SRC_SRC_SWIZZLE_X);
-      src->swizzle_y = READ(dw, GEN6_3SRC_SRC_SWIZZLE_Y);
-      src->swizzle_z = READ(dw, GEN6_3SRC_SRC_SWIZZLE_Z);
-      src->swizzle_w = READ(dw, GEN6_3SRC_SRC_SWIZZLE_W);
+      src->swizzle_x = GEN_EXTRACT(dw, GEN6_3SRC_SRC_SWIZZLE_X);
+      src->swizzle_y = GEN_EXTRACT(dw, GEN6_3SRC_SRC_SWIZZLE_Y);
+      src->swizzle_z = GEN_EXTRACT(dw, GEN6_3SRC_SRC_SWIZZLE_Z);
+      src->swizzle_w = GEN_EXTRACT(dw, GEN6_3SRC_SRC_SWIZZLE_W);
    }
 }
 
@@ -1162,16 +1163,16 @@ disasm_printer_add_mdesc_sampler(struct disasm_printer *printer,
    int op, simd;
 
    if (inst->dev->gen >= ILO_GEN(7)) {
-      op = READ(mdesc, GEN7_MSG_SAMPLER_OP);
-      simd = READ(mdesc, GEN7_MSG_SAMPLER_SIMD);
+      op = GEN_EXTRACT(mdesc, GEN7_MSG_SAMPLER_OP);
+      simd = GEN_EXTRACT(mdesc, GEN7_MSG_SAMPLER_SIMD);
    } {
-      op = READ(mdesc, GEN6_MSG_SAMPLER_OP);
-      simd = READ(mdesc, GEN6_MSG_SAMPLER_SIMD);
+      op = GEN_EXTRACT(mdesc, GEN6_MSG_SAMPLER_OP);
+      simd = GEN_EXTRACT(mdesc, GEN6_MSG_SAMPLER_SIMD);
    }
 
    disasm_printer_add(printer, " (%d, %d, %d, %d)",
-         READ(mdesc, GEN6_MSG_SAMPLER_SURFACE),
-         READ(mdesc, GEN6_MSG_SAMPLER_INDEX),
+         GEN_EXTRACT(mdesc, GEN6_MSG_SAMPLER_SURFACE),
+         GEN_EXTRACT(mdesc, GEN6_MSG_SAMPLER_INDEX),
          op, simd);
 }
 
@@ -1185,7 +1186,7 @@ disasm_printer_add_mdesc_urb(struct disasm_printer *printer,
    bool interleaved, complete, allocate, used;
 
    if (inst->dev->gen >= ILO_GEN(7)) {
-      switch (READ(mdesc, GEN7_MSG_URB_OP)) {
+      switch (GEN_EXTRACT(mdesc, GEN7_MSG_URB_OP)) {
       case GEN7_MSG_URB_WRITE_HWORD:   op = "write HWord";  break;
       case GEN7_MSG_URB_WRITE_OWORD:   op = "write OWord";  break;
       case GEN7_MSG_URB_READ_HWORD:    op = "read HWord";   break;
@@ -1195,20 +1196,20 @@ disasm_printer_add_mdesc_urb(struct disasm_printer *printer,
       default:                         op = "BAD";          break;
       }
 
-      offset = READ(mdesc, GEN7_MSG_URB_GLOBAL_OFFSET);
+      offset = GEN_EXTRACT(mdesc, GEN7_MSG_URB_GLOBAL_OFFSET);
       interleaved = mdesc & GEN7_MSG_URB_INTERLEAVED;
       complete = mdesc & GEN7_MSG_URB_COMPLETE;
 
       allocate = false;
       used = false;
    } else {
-      switch (READ(mdesc, GEN6_MSG_URB_OP)) {
+      switch (GEN_EXTRACT(mdesc, GEN6_MSG_URB_OP)) {
       case GEN6_MSG_URB_WRITE:         op = "urb_write";    break;
       case GEN6_MSG_URB_FF_SYNC:       op = "ff_sync";      break;
       default:                         op = "BAD";          break;
       }
 
-      offset = READ(mdesc, GEN6_MSG_URB_OFFSET);
+      offset = GEN_EXTRACT(mdesc, GEN6_MSG_URB_OFFSET);
       interleaved = mdesc & GEN6_MSG_URB_INTERLEAVED;
       complete = mdesc & GEN6_MSG_URB_COMPLETE;
 
@@ -1229,13 +1230,13 @@ disasm_printer_add_mdesc_dp_sampler(struct disasm_printer *printer,
                                     uint32_t mdesc)
 {
    const int op = (inst->dev->gen >= ILO_GEN(7)) ?
-      READ(mdesc, GEN7_MSG_DP_OP) : READ(mdesc, GEN6_MSG_DP_OP);
+      GEN_EXTRACT(mdesc, GEN7_MSG_DP_OP) : GEN_EXTRACT(mdesc, GEN6_MSG_DP_OP);
    const bool write_commit = (inst->dev->gen == ILO_GEN(6)) ?
          (mdesc & GEN6_MSG_DP_SEND_WRITE_COMMIT) : 0;
 
    disasm_printer_add(printer, " (%d, %d, %d, %d)",
-         READ(mdesc, GEN6_MSG_DP_SURFACE),
-         READ(mdesc, GEN6_MSG_DP_OWORD_BLOCK_SIZE),
+         GEN_EXTRACT(mdesc, GEN6_MSG_DP_SURFACE),
+         GEN_EXTRACT(mdesc, GEN6_MSG_DP_OWORD_BLOCK_SIZE),
          op, write_commit);
 }
 
@@ -1245,7 +1246,7 @@ disasm_printer_add_mdesc_dp_rc(struct disasm_printer *printer,
                                uint32_t mdesc)
 {
    const int op = (inst->dev->gen >= ILO_GEN(7)) ?
-      READ(mdesc, GEN7_MSG_DP_OP) : READ(mdesc, GEN6_MSG_DP_OP);
+      GEN_EXTRACT(mdesc, GEN7_MSG_DP_OP) : GEN_EXTRACT(mdesc, GEN6_MSG_DP_OP);
    const char *str;
    bool is_rt_write;
 
@@ -1315,7 +1316,7 @@ disasm_printer_add_mdesc_dp_rc(struct disasm_printer *printer,
    }
 
    disasm_printer_add(printer, " Surface = %d",
-         READ(mdesc, GEN6_MSG_DP_SURFACE));
+         GEN_EXTRACT(mdesc, GEN6_MSG_DP_SURFACE));
 }
 
 static void
@@ -1352,8 +1353,8 @@ disasm_printer_add_mdesc(struct disasm_printer *printer,
    }
 
    disasm_printer_add(printer, " mlen %d rlen %d",
-         READ(mdesc, GEN6_MSG_MLEN),
-         READ(mdesc, GEN6_MSG_RLEN));
+         GEN_EXTRACT(mdesc, GEN6_MSG_MLEN),
+         GEN_EXTRACT(mdesc, GEN6_MSG_RLEN));
 }
 
 static void