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authorTom Stellard <[email protected]>2012-05-23 12:10:10 -0400
committerTom Stellard <[email protected]>2012-05-24 14:12:30 -0400
commit86dfae1103faa9e0329e68e3ab7c1684a0c12892 (patch)
tree1fe94915d1069a687ef86a9bf51dae9fc4bc1938 /src
parentcc7a6d269170cc3668caa4f5af29228920e8d7a7 (diff)
radeon/llvm: Handle SETGE_INT, SETGE_UINT, and SETGT_UINT opcodes
Support for these was inadvertently dropped in commit cee23ab246f22210b3063cdc47bdb45b3d943526
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/radeon/R600InstrInfo.cpp6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/R600InstrInfo.cpp b/src/gallium/drivers/radeon/R600InstrInfo.cpp
index af106b225f9..684001593e7 100644
--- a/src/gallium/drivers/radeon/R600InstrInfo.cpp
+++ b/src/gallium/drivers/radeon/R600InstrInfo.cpp
@@ -73,11 +73,17 @@ unsigned R600InstrInfo::getISAOpcode(unsigned opcode) const
return AMDIL::SETE_INT;
case AMDIL::INE:
return AMDIL::SETNE_INT;
+ case AMDIL::IGE:
+ return AMDIL::SETGE_INT;
case AMDIL::MOVE_f32:
case AMDIL::MOVE_i32:
return AMDIL::MOV;
case AMDIL::SHR_i32:
return getASHRop();
+ case AMDIL::UGE:
+ return AMDIL::SETGE_UINT;
+ case AMDIL::UGT:
+ return AMDIL::SETGT_UINT;
case AMDIL::USHR_i32:
return getLSHRop();
}