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authorFrancisco Jerez <[email protected]>2016-04-27 02:07:08 -0700
committerFrancisco Jerez <[email protected]>2016-05-23 14:05:21 -0700
commit7eb496688762ea614408c4c75e4b5c7242d2677c (patch)
tree1c7cc80213950fb1fdd2c6a8b31b66477a098a4c /src
parent6fc5dd5b6a3e4884b475bae7507ea59e59800e67 (diff)
i965/fs: Allow spilling of non-contiguous registers.
This should be working fine now. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94997 Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp21
1 files changed, 2 insertions, 19 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
index 874013e57b5..e770a7f91cc 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
@@ -835,30 +835,13 @@ fs_visitor::choose_spill_reg(struct ra_graph *g)
*/
foreach_block_and_inst(block, fs_inst, inst, cfg) {
for (unsigned int i = 0; i < inst->sources; i++) {
- if (inst->src[i].file == VGRF) {
+ if (inst->src[i].file == VGRF)
spill_costs[inst->src[i].nr] += loop_scale;
-
- /* Register spilling logic assumes full-width registers; smeared
- * registers have a width of 1 so if we try to spill them we'll
- * generate invalid assembly. This shouldn't be a problem because
- * smeared registers are only used as short-term temporaries when
- * loading pull constants, so spilling them is unlikely to reduce
- * register pressure anyhow.
- */
- if (!inst->src[i].is_contiguous()) {
- no_spill[inst->src[i].nr] = true;
- }
- }
}
- if (inst->dst.file == VGRF) {
+ if (inst->dst.file == VGRF)
spill_costs[inst->dst.nr] += inst->regs_written * loop_scale;
- if (!inst->dst.is_contiguous()) {
- no_spill[inst->dst.nr] = true;
- }
- }
-
switch (inst->opcode) {
case BRW_OPCODE_DO: