diff options
| author | Jason Ekstrand <[email protected]> | 2017-05-26 09:33:55 -0700 |
|---|---|---|
| committer | Jason Ekstrand <[email protected]> | 2017-06-07 22:18:53 -0700 |
| commit | 5097fcbfdc8dc5aab779af92022f9b5ff16026f0 (patch) | |
| tree | 335fa0f4848c35787646c853ae71415c3ef17ca3 /src | |
| parent | cb2a13e895adbbaa3a759abdcf6fbb89bb1523fe (diff) | |
i965: Mark depth surfaces as needing a HiZ resolve after blitting
Cc: "17.0 17.1" <[email protected]>
Reviewed-by: Topi Pohjolainen <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
Reviewed-by: Chad Versace <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mesa/drivers/dri/i965/intel_blit.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c index 61764fbe965..817fe7ac56b 100644 --- a/src/mesa/drivers/dri/i965/intel_blit.c +++ b/src/mesa/drivers/dri/i965/intel_blit.c @@ -328,6 +328,7 @@ intel_miptree_blit(struct brw_context *brw, intel_miptree_slice_resolve_depth(brw, dst_mt, dst_level, dst_slice); intel_miptree_resolve_color(brw, src_mt, src_level, src_slice, 1, 0); intel_miptree_resolve_color(brw, dst_mt, dst_level, dst_slice, 1, 0); + intel_miptree_slice_set_needs_hiz_resolve(dst_mt, dst_level, dst_slice); if (src_flip) src_y = minify(src_mt->physical_height0, src_level - src_mt->first_level) - src_y - height; @@ -386,6 +387,7 @@ intel_miptree_copy(struct brw_context *brw, intel_miptree_slice_resolve_depth(brw, dst_mt, dst_level, dst_slice); intel_miptree_resolve_color(brw, src_mt, src_level, src_slice, 1, 0); intel_miptree_resolve_color(brw, dst_mt, dst_level, dst_slice, 1, 0); + intel_miptree_slice_set_needs_hiz_resolve(dst_mt, dst_level, dst_slice); uint32_t src_image_x, src_image_y; intel_miptree_get_image_offset(src_mt, src_level, src_slice, |