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authorDave Airlie <[email protected]>2011-08-24 13:27:06 +0100
committerDave Airlie <[email protected]>2011-08-24 13:30:53 +0100
commitcc9a8915f093c57d2748370d18ed47f66c933013 (patch)
treedb04799315e687bbc3655788bc1bc6773a9b31de /src
parent1284d5b25507a56634519ac385cbc00a00b94417 (diff)
r600g: fill out missing entries in opcode tables.
this just adds the missing opcodes as unsupported. Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/r600/r600_shader.c36
1 files changed, 36 insertions, 0 deletions
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index 406e87bdb00..c37bb729ce3 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -3366,6 +3366,18 @@ static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] = {
{TGSI_OPCODE_CASE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_DEFAULT, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_ENDSWITCH, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
+ {TGSI_OPCODE_LOAD, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_LOAD_MS, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_B, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_C, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_C_LZ, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_D, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_L, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_GATHER4, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_RESINFO, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_POS, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_INFO, 0, 0, tgsi_unsupported},
{TGSI_OPCODE_LAST, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
};
@@ -3524,6 +3536,18 @@ static struct r600_shader_tgsi_instruction eg_shader_tgsi_instruction[] = {
{TGSI_OPCODE_CASE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_DEFAULT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_ENDSWITCH, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
+ {TGSI_OPCODE_LOAD, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_LOAD_MS, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_B, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_C, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_C_LZ, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_D, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_L, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_GATHER4, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_RESINFO, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_POS, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_INFO, 0, 0, tgsi_unsupported},
{TGSI_OPCODE_LAST, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
};
@@ -3682,5 +3706,17 @@ static struct r600_shader_tgsi_instruction cm_shader_tgsi_instruction[] = {
{TGSI_OPCODE_CASE, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_DEFAULT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
{TGSI_OPCODE_ENDSWITCH, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
+ {TGSI_OPCODE_LOAD, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_LOAD_MS, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_B, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_C, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_C_LZ, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_D, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_L, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_GATHER4, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_RESINFO, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_POS, 0, 0, tgsi_unsupported},
+ {TGSI_OPCODE_SAMPLE_INFO, 0, 0, tgsi_unsupported},
{TGSI_OPCODE_LAST, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
};