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authorRoy Spliet <[email protected]>2015-02-06 22:46:55 +0100
committerIlia Mirkin <[email protected]>2015-02-10 08:02:02 -0500
commit3dc39d0bca0f06454cb5cddf7571facb7671767a (patch)
tree0730eacc275239b898fa7c93be63a69171de65a1 /src
parentfb63df22151fcf6a2fdbc739bd9a84a77bff0270 (diff)
nv50/ir: Add emit support for MAD IMM format
But don't enable generation of it in the opProperties, because we can't guarantee the SDST==SRC2 constraint until after register assignment. We'll add a post-RA folding pass to utilise this. Signed-off-by: Roy Spliet <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp
index 23e4babfed0..b1e740954f5 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp
@@ -939,6 +939,14 @@ CodeEmitterNV50::emitFMAD(const Instruction *i)
code[0] = 0xe0000000;
+ if (i->src(1).getFile() == FILE_IMMEDIATE) {
+ code[1] = 0;
+ emitForm_IMM(i);
+ code[0] |= neg_mul << 15;
+ code[0] |= neg_add << 22;
+ if (i->saturate)
+ code[0] |= 1 << 8;
+ } else
if (i->encSize == 4) {
emitForm_MUL(i);
code[0] |= neg_mul << 15;