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authorSonny Jiang <[email protected]>2015-11-03 11:46:38 -0500
committerAlex Deucher <[email protected]>2016-03-24 23:06:39 -0400
commitf5e24b19e883281452952ecce3e811cda1f7946c (patch)
treed147f9c5655bed833cd722209e79e2f5acdf86c6 /src
parent511ce2925baf90c1d93d3e6a389d31e8e7549493 (diff)
winsys/amdgpu: addrlib - add Polaris support (v2)
v2: fix indentation as noted by Michel Signed-off-by: Sonny Jiang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/winsys/amdgpu/drm/addrlib/r800/ciaddrlib.cpp8
-rw-r--r--src/gallium/winsys/amdgpu/drm/addrlib/r800/ciaddrlib.h2
-rw-r--r--src/gallium/winsys/amdgpu/drm/amdgpu_id.h10
3 files changed, 18 insertions, 2 deletions
diff --git a/src/gallium/winsys/amdgpu/drm/addrlib/r800/ciaddrlib.cpp b/src/gallium/winsys/amdgpu/drm/addrlib/r800/ciaddrlib.cpp
index 570216241d1..7c5d29a2166 100644
--- a/src/gallium/winsys/amdgpu/drm/addrlib/r800/ciaddrlib.cpp
+++ b/src/gallium/winsys/amdgpu/drm/addrlib/r800/ciaddrlib.cpp
@@ -351,6 +351,8 @@ AddrChipFamily CIAddrLib::HwlConvertChipFamily(
m_settings.isIceland = ASICREV_IS_ICELAND_M(uChipRevision);
m_settings.isTonga = ASICREV_IS_TONGA_P(uChipRevision);
m_settings.isFiji = ASICREV_IS_FIJI_P(uChipRevision);
+ m_settings.isPolaris10 = ASICREV_IS_POLARIS10_P(uChipRevision);
+ m_settings.isPolaris11 = ASICREV_IS_POLARIS11_M(uChipRevision);
break;
case FAMILY_CZ:
m_settings.isCarrizo = 1;
@@ -403,7 +405,7 @@ BOOL_32 CIAddrLib::HwlInitGlobalParams(
// @todo: VI
// Move this to VI code path once created
- if (m_settings.isTonga)
+ if (m_settings.isTonga || m_settings.isPolaris10)
{
m_pipes = 8;
}
@@ -415,6 +417,10 @@ BOOL_32 CIAddrLib::HwlInitGlobalParams(
{
m_pipes = 16;
}
+ else if (m_settings.isPolaris11)
+ {
+ m_pipes = 4;
+ }
if (valid)
{
diff --git a/src/gallium/winsys/amdgpu/drm/addrlib/r800/ciaddrlib.h b/src/gallium/winsys/amdgpu/drm/addrlib/r800/ciaddrlib.h
index 4cbe9706baa..de995fa4058 100644
--- a/src/gallium/winsys/amdgpu/drm/addrlib/r800/ciaddrlib.h
+++ b/src/gallium/winsys/amdgpu/drm/addrlib/r800/ciaddrlib.h
@@ -60,6 +60,8 @@ struct CIChipSettings
UINT_32 isIceland : 1;
UINT_32 isTonga : 1;
UINT_32 isFiji : 1;
+ UINT_32 isPolaris10 : 1;
+ UINT_32 isPolaris11 : 1;
// VI fusion (Carrizo)
UINT_32 isCarrizo : 1;
};
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_id.h b/src/gallium/winsys/amdgpu/drm/amdgpu_id.h
index 90fe0cd50f1..40b835c2248 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_id.h
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_id.h
@@ -138,6 +138,10 @@ enum {
VI_FIJI_P_A0 = 60,
+ VI_POLARIS10_P_A0 = 80,
+
+ VI_POLARIS11_M_A0 = 90,
+
VI_UNKNOWN = 0xFF
};
@@ -147,7 +151,11 @@ enum {
#define ASICREV_IS_TONGA_P(eChipRev) \
((eChipRev >= VI_TONGA_P_A0) && (eChipRev < VI_FIJI_P_A0))
#define ASICREV_IS_FIJI_P(eChipRev) \
- (eChipRev >= VI_FIJI_P_A0)
+ ((eChipRev >= VI_FIJI_P_A0) && (eChipRev < VI_POLARIS10_P_A0))
+#define ASICREV_IS_POLARIS10_P(eChipRev)\
+ ((eChipRev >= VI_POLARIS10_P_A0) && (eChipRev < VI_POLARIS11_M_A0))
+#define ASICREV_IS_POLARIS11_M(eChipRev) \
+ (eChipRev >= VI_POLARIS11_M_A0)
/* CZ specific rev IDs */
enum {