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authorNicolai Hähnle <[email protected]>2017-02-13 13:08:52 +0100
committerNicolai Hähnle <[email protected]>2017-03-28 10:22:12 +0200
commitf0d9af772e0fbb5854fc8293186a70ea3721748a (patch)
tree1fb6b63495b14c542643591076cba306b17618af /src
parentd9014952f5ca10a5292df3bb8c4bf1b7ccaed240 (diff)
radeonsi: CP DMA clear supports unaligned destination addresses
Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/radeonsi/si_cp_dma.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c b/src/gallium/drivers/radeonsi/si_cp_dma.c
index b40f5cc5871..0cf7b3b3cbc 100644
--- a/src/gallium/drivers/radeonsi/si_cp_dma.c
+++ b/src/gallium/drivers/radeonsi/si_cp_dma.c
@@ -197,7 +197,7 @@ static void si_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst,
offset + size);
/* Fallback for unaligned clears. */
- if (offset % 4 != 0 || size % 4 != 0) {
+ if (size % 4 != 0) {
uint8_t *map = r600_buffer_map_sync_with_rings(&sctx->b, rdst,
PIPE_TRANSFER_WRITE);
map += offset;
@@ -211,6 +211,7 @@ static void si_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst,
/* dma_clear_buffer can use clear_buffer on failure. Make sure that
* doesn't happen. We don't want an infinite recursion: */
if (sctx->b.dma.cs &&
+ (offset % 4 == 0) &&
/* CP DMA is very slow. Always use SDMA for big clears. This
* alone improves DeusEx:MD performance by 70%. */
(size > 128 * 1024 ||