diff options
| author | Bas Nieuwenhuizen <[email protected]> | 2017-06-06 19:15:47 +0200 |
|---|---|---|
| committer | Bas Nieuwenhuizen <[email protected]> | 2017-06-06 23:23:43 +0200 |
| commit | e08f7416780389c96d4359474ef69ae73a9ab530 (patch) | |
| tree | a58229443fd32a696abe6a345b85a4a5efd2f809 /src | |
| parent | 4ec89727b28bcfcc24cf2fa8b6d0a7eb6927fd3f (diff) | |
radv: Add early exit for cache flushes.
No sense checking each bit separately in the common case of none
being set.
Signed-off-by: Bas Nieuwenhuizen <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/amd/vulkan/si_cmd_buffer.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index a10034e4f20..1011c2d3393 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan/si_cmd_buffer.c @@ -1089,6 +1089,9 @@ si_emit_cache_flush(struct radv_cmd_buffer *cmd_buffer) RADV_CMD_FLAG_VS_PARTIAL_FLUSH | RADV_CMD_FLAG_VGT_FLUSH); + if (!cmd_buffer->state.flush_bits) + return; + radeon_check_space(cmd_buffer->device->ws, cmd_buffer->cs, 128); uint32_t *ptr = NULL; @@ -1104,8 +1107,7 @@ si_emit_cache_flush(struct radv_cmd_buffer *cmd_buffer) cmd_buffer->state.flush_bits); - if (cmd_buffer->state.flush_bits) - radv_cmd_buffer_trace_emit(cmd_buffer); + radv_cmd_buffer_trace_emit(cmd_buffer); cmd_buffer->state.flush_bits = 0; } |