diff options
author | Eric Anholt <[email protected]> | 2017-10-05 15:50:59 -0700 |
---|---|---|
committer | Eric Anholt <[email protected]> | 2017-10-10 11:42:06 -0700 |
commit | ae9a56db6a73c6a5dfc237e30fdf8ad0186b884b (patch) | |
tree | 8d2651e70b47dae8d5630a4661614d76661a9b66 /src | |
parent | c0561808c0442a10a47707cfc9f002e195316552 (diff) |
braodcom/vc5: Set up clear color for higher-bpp formats.
Fixes arb_color_buffer_float-clear
Diffstat (limited to 'src')
-rw-r--r-- | src/broadcom/cle/v3d_packet_v33.xml | 20 | ||||
-rw-r--r-- | src/gallium/drivers/vc5/vc5_rcl.c | 29 |
2 files changed, 45 insertions, 4 deletions
diff --git a/src/broadcom/cle/v3d_packet_v33.xml b/src/broadcom/cle/v3d_packet_v33.xml index 2487daea503..8f7966439c1 100644 --- a/src/broadcom/cle/v3d_packet_v33.xml +++ b/src/broadcom/cle/v3d_packet_v33.xml @@ -580,6 +580,26 @@ <field name="sub-id" size="4" start="0" type="uint" default="4"/> </packet> + <packet code="121" name="Tile Rendering Mode Configuration (Clear Colors Part2)" cl="R"> + <!-- Express this as a 56-bit field? --> + <field name="Clear Color mid-high 24 bits" size="24" start="40" type="uint"/> + <field name="Clear Color mid-low 32 bits" size="32" start="8" type="uint"/> + + <field name="Render Target number" size="4" start="4" type="uint"/> + <field name="sub-id" size="4" start="0" type="uint" default="5"/> + </packet> + + <packet code="121" name="Tile Rendering Mode Configuration (Clear Colors Part3)" cl="R"> + <field name="pad" size="11" start="53" type="uint"/> + <field name="UIF padded height in UIF blocks" size="13" start="40" type="uint"/> + <!-- image height is for Y flipping --> + <field name="Raster Row Stride or Image Height in Pixels" size="16" start="24" type="uint"/> + <field name="Clear Color high 16 bits" size="16" start="8" type="uint"/> + + <field name="Render Target number" size="4" start="4" type="uint"/> + <field name="sub-id" size="4" start="0" type="uint" default="6"/> + </packet> + <packet code="124" name="Tile Coordinates"> <field name="tile row number" size="12" start="12" type="uint"/> <field name="tile column number" size="12" start="0" type="uint"/> diff --git a/src/gallium/drivers/vc5/vc5_rcl.c b/src/gallium/drivers/vc5/vc5_rcl.c index 83b383acd1a..0706da613cb 100644 --- a/src/gallium/drivers/vc5/vc5_rcl.c +++ b/src/gallium/drivers/vc5/vc5_rcl.c @@ -130,11 +130,11 @@ vc5_emit_rcl(struct vc5_job *job) } for (int i = 0; i < nr_cbufs; i++) { - cl_emit(&job->rcl, TILE_RENDERING_MODE_CONFIGURATION_RENDER_TARGET_CONFIG, rt) { - struct pipe_surface *psurf = job->cbufs[i]; - if (!psurf) - continue; + struct pipe_surface *psurf = job->cbufs[i]; + if (!psurf) + continue; + cl_emit(&job->rcl, TILE_RENDERING_MODE_CONFIGURATION_RENDER_TARGET_CONFIG, rt) { struct vc5_surface *surf = vc5_surface(psurf); struct vc5_resource *rsc = vc5_resource(psurf->texture); rt.address = cl_address(rsc->bo, surf->offset); @@ -154,6 +154,27 @@ vc5_emit_rcl(struct vc5_job *job) clear.clear_color_next_24_bits = job->clear_color[i][1] & 0xffffff; clear.render_target_number = i; }; + + if (util_format_get_blocksize(psurf->format) > 7) { + cl_emit(&job->rcl, TILE_RENDERING_MODE_CONFIGURATION_CLEAR_COLORS_PART2, + clear) { + clear.clear_color_mid_low_32_bits = + ((job->clear_color[i][1] >> 24) | + (job->clear_color[i][2] << 8)); + clear.clear_color_mid_high_24_bits = + ((job->clear_color[i][2] >> 24) | + ((job->clear_color[i][3] & 0xffff) << 8)); + clear.render_target_number = i; + }; + } + + if (util_format_get_blocksize(psurf->format) > 14) { + cl_emit(&job->rcl, TILE_RENDERING_MODE_CONFIGURATION_CLEAR_COLORS_PART3, + clear) { + clear.clear_color_high_16_bits = job->clear_color[i][3] >> 16; + clear.render_target_number = i; + }; + } } /* TODO: Don't bother emitting if we don't load/clear Z/S. */ |