diff options
| author | Dave Airlie <[email protected]> | 2017-07-26 02:32:39 +0100 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2017-07-26 23:38:17 +0100 |
| commit | a81e99f50a718790de379087c9f5a636e32b2a28 (patch) | |
| tree | 735b36751d9df5fd4e0811484de18432f5da780f /src | |
| parent | f6e478c213c30203e9623d5657fd3789cf6368f3 (diff) | |
radv/ac: realign SI workaround with radeonsi.
This ports: da7453666ae
radeonsi: don't apply the Z export bug workaround to Hainan
to radv.
Just noticed in passing.
Fixes: f4e499ec7 (radv: add initial non-conformant radv vulkan driver)
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/amd/common/ac_nir_to_llvm.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 9a69066afa2..a427f484b56 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -5815,10 +5815,11 @@ si_export_mrt_z(struct nir_to_llvm_context *ctx, args.enabled_channels |= 0x4; } - /* SI (except OLAND) has a bug that it only looks + /* SI (except OLAND and HAINAN) has a bug that it only looks * at the X writemask component. */ if (ctx->options->chip_class == SI && - ctx->options->family != CHIP_OLAND) + ctx->options->family != CHIP_OLAND && + ctx->options->family != CHIP_HAINAN) args.enabled_channels |= 0x1; ac_build_export(&ctx->ac, &args); |