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authorNicolai Hähnle <[email protected]>2016-07-20 19:22:18 +0200
committerMarek Olšák <[email protected]>2017-03-30 14:44:33 +0200
commit8b110f03191624b4a41c729297ecc58adeca2e31 (patch)
treee33ffa8f73e8c5735ffb8a070921eb635aee7c1c /src
parentca6a38fd6a6b431b4f46478dfbf71452324f5377 (diff)
amdgpu/addrlib: Add a member "bpp" for input of method AddrConvertTileIndex and AddrConvertTileInfoToHW
When clients queries tile Info from tile index and expects accurate tileSplit info, bits per pixel info is required to be provided since this is necessary for computing tileSplitBytes; otherwise Addrlib will return value of "tileBytes" instead if bpp is 0 - which is also current logic. If clients don't need tileSplit info, it's OK to pass bpp with value 0.
Diffstat (limited to 'src')
-rw-r--r--src/amd/addrlib/addrinterface.h2
-rw-r--r--src/amd/addrlib/core/addrlib1.cpp37
-rw-r--r--src/amd/addrlib/core/addrlib1.h2
-rw-r--r--src/amd/addrlib/r800/ciaddrlib.cpp39
-rw-r--r--src/amd/addrlib/r800/ciaddrlib.h2
-rw-r--r--src/amd/addrlib/r800/siaddrlib.cpp1
-rw-r--r--src/amd/addrlib/r800/siaddrlib.h2
7 files changed, 53 insertions, 32 deletions
diff --git a/src/amd/addrlib/addrinterface.h b/src/amd/addrlib/addrinterface.h
index bd10310dad2..01d8788f4b8 100644
--- a/src/amd/addrlib/addrinterface.h
+++ b/src/amd/addrlib/addrinterface.h
@@ -1877,6 +1877,7 @@ typedef struct _ADDR_CONVERT_TILEINFOTOHW_INPUT
/// while the global useTileIndex is set to 1
INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
///< README: When tileIndex is not -1, this must be valid
+ UINT_32 bpp; ///< Bits per pixel
} ADDR_CONVERT_TILEINFOTOHW_INPUT;
/**
@@ -1925,6 +1926,7 @@ typedef struct _ADDR_CONVERT_TILEINDEX_INPUT
INT_32 tileIndex; ///< Tile index
INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
+ UINT_32 bpp; ///< Bits per pixel
BOOL_32 tileInfoHw; ///< Set to TRUE if client wants HW enum, otherwise actual
} ADDR_CONVERT_TILEINDEX_INPUT;
diff --git a/src/amd/addrlib/core/addrlib1.cpp b/src/amd/addrlib/core/addrlib1.cpp
index 3252fd49ada..1dc61e01273 100644
--- a/src/amd/addrlib/core/addrlib1.cpp
+++ b/src/amd/addrlib/core/addrlib1.cpp
@@ -307,7 +307,8 @@ ADDR_E_RETURNCODE AddrLib1::ComputeSurfaceInfo(
// If macroModeIndex is not needed, then call HwlSetupTileCfg to get tile info
if (macroModeIndex == TileIndexNoMacroIndex)
{
- returnCode = HwlSetupTileCfg(localIn.tileIndex, macroModeIndex,
+ returnCode = HwlSetupTileCfg(localIn.bpp,
+ localIn.tileIndex, macroModeIndex,
localIn.pTileInfo,
&localIn.tileMode, &localIn.tileType);
}
@@ -475,7 +476,7 @@ ADDR_E_RETURNCODE AddrLib1::ComputeSurfaceAddrFromCoord(
// If macroModeIndex is not needed, then call HwlSetupTileCfg to get tile info
if (macroModeIndex == TileIndexNoMacroIndex)
{
- returnCode = HwlSetupTileCfg(input.tileIndex, macroModeIndex,
+ returnCode = HwlSetupTileCfg(input.bpp, input.tileIndex, macroModeIndex,
input.pTileInfo, &input.tileMode, &input.tileType);
}
// If macroModeIndex is invalid, then assert this is not macro tiled
@@ -555,7 +556,7 @@ ADDR_E_RETURNCODE AddrLib1::ComputeSurfaceCoordFromAddr(
// If macroModeIndex is not needed, then call HwlSetupTileCfg to get tile info
if (macroModeIndex == TileIndexNoMacroIndex)
{
- returnCode = HwlSetupTileCfg(input.tileIndex, macroModeIndex,
+ returnCode = HwlSetupTileCfg(input.bpp, input.tileIndex, macroModeIndex,
input.pTileInfo, &input.tileMode, &input.tileType);
}
// If macroModeIndex is invalid, then assert this is not macro tiled
@@ -615,7 +616,7 @@ ADDR_E_RETURNCODE AddrLib1::ComputeSliceTileSwizzle(
// Use temp tile info for calcalation
input.pTileInfo = &tileInfoNull;
- returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex,
+ returnCode = HwlSetupTileCfg(0, input.tileIndex, input.macroModeIndex,
input.pTileInfo, &input.tileMode);
// Change the input structure
pIn = &input;
@@ -668,7 +669,7 @@ ADDR_E_RETURNCODE AddrLib1::ExtractBankPipeSwizzle(
// Use temp tile info for calcalation
input.pTileInfo = &tileInfoNull;
- returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, input.pTileInfo);
+ returnCode = HwlSetupTileCfg(0, input.tileIndex, input.macroModeIndex, input.pTileInfo);
// Change the input structure
pIn = &input;
}
@@ -720,7 +721,7 @@ ADDR_E_RETURNCODE AddrLib1::CombineBankPipeSwizzle(
// Use temp tile info for calcalation
input.pTileInfo = &tileInfoNull;
- returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, input.pTileInfo);
+ returnCode = HwlSetupTileCfg(0, input.tileIndex, input.macroModeIndex, input.pTileInfo);
// Change the input structure
pIn = &input;
}
@@ -774,7 +775,7 @@ ADDR_E_RETURNCODE AddrLib1::ComputeBaseSwizzle(
// Use temp tile info for calcalation
input.pTileInfo = &tileInfoNull;
- returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, input.pTileInfo);
+ returnCode = HwlSetupTileCfg(0, input.tileIndex, input.macroModeIndex, input.pTileInfo);
// Change the input structure
pIn = &input;
}
@@ -861,7 +862,7 @@ ADDR_E_RETURNCODE AddrLib1::ComputeFmaskInfo(
// If macroModeIndex is not needed, then call HwlSetupTileCfg to get tile info
if (macroModeIndex == TileIndexNoMacroIndex)
{
- returnCode = HwlSetupTileCfg(input.tileIndex, macroModeIndex,
+ returnCode = HwlSetupTileCfg(0, input.tileIndex, macroModeIndex,
input.pTileInfo, &input.tileMode);
}
@@ -1014,7 +1015,8 @@ ADDR_E_RETURNCODE AddrLib1::ConvertTileInfoToHW(
input = *pIn;
input.pTileInfo = &tileInfoNull;
- returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, input.pTileInfo);
+ returnCode = HwlSetupTileCfg(input.bpp, input.tileIndex,
+ input.macroModeIndex, input.pTileInfo);
pIn = &input;
}
@@ -1058,7 +1060,7 @@ ADDR_E_RETURNCODE AddrLib1::ConvertTileIndex(
if (returnCode == ADDR_OK)
{
- returnCode = HwlSetupTileCfg(pIn->tileIndex, pIn->macroModeIndex,
+ returnCode = HwlSetupTileCfg(pIn->bpp, pIn->tileIndex, pIn->macroModeIndex,
pOut->pTileInfo, &pOut->tileMode, &pOut->tileType);
if (returnCode == ADDR_OK && pIn->tileInfoHw)
@@ -1226,7 +1228,7 @@ ADDR_E_RETURNCODE AddrLib1::ComputeHtileInfo(
// Use temp tile info for calcalation
input.pTileInfo = &tileInfoNull;
- returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, input.pTileInfo);
+ returnCode = HwlSetupTileCfg(0, input.tileIndex, input.macroModeIndex, input.pTileInfo);
// Change the input structure
pIn = &input;
@@ -1293,7 +1295,7 @@ ADDR_E_RETURNCODE AddrLib1::ComputeCmaskInfo(
// Use temp tile info for calcalation
input.pTileInfo = &tileInfoNull;
- returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, input.pTileInfo);
+ returnCode = HwlSetupTileCfg(0, input.tileIndex, input.macroModeIndex, input.pTileInfo);
// Change the input structure
pIn = &input;
@@ -1356,7 +1358,7 @@ ADDR_E_RETURNCODE AddrLib1::ComputeDccInfo(
{
input = *pIn;
- ret = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex,
+ ret = HwlSetupTileCfg(input.bpp, input.tileIndex, input.macroModeIndex,
&input.tileInfo, &input.tileMode);
pIn = &input;
@@ -1412,7 +1414,7 @@ ADDR_E_RETURNCODE AddrLib1::ComputeHtileAddrFromCoord(
// Use temp tile info for calcalation
input.pTileInfo = &tileInfoNull;
- returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, input.pTileInfo);
+ returnCode = HwlSetupTileCfg(0, input.tileIndex, input.macroModeIndex, input.pTileInfo);
// Change the input structure
pIn = &input;
@@ -1480,7 +1482,7 @@ ADDR_E_RETURNCODE AddrLib1::ComputeHtileCoordFromAddr(
// Use temp tile info for calcalation
input.pTileInfo = &tileInfoNull;
- returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, input.pTileInfo);
+ returnCode = HwlSetupTileCfg(0, input.tileIndex, input.macroModeIndex, input.pTileInfo);
// Change the input structure
pIn = &input;
@@ -1545,7 +1547,7 @@ ADDR_E_RETURNCODE AddrLib1::ComputeCmaskAddrFromCoord(
// Use temp tile info for calcalation
input.pTileInfo = &tileInfoNull;
- returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, input.pTileInfo);
+ returnCode = HwlSetupTileCfg(0, input.tileIndex, input.macroModeIndex, input.pTileInfo);
// Change the input structure
pIn = &input;
@@ -1617,7 +1619,7 @@ ADDR_E_RETURNCODE AddrLib1::ComputeCmaskCoordFromAddr(
// Use temp tile info for calcalation
input.pTileInfo = &tileInfoNull;
- returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, input.pTileInfo);
+ returnCode = HwlSetupTileCfg(0, input.tileIndex, input.macroModeIndex, input.pTileInfo);
// Change the input structure
pIn = &input;
@@ -3422,6 +3424,7 @@ ADDR_E_RETURNCODE AddrLib1::PostComputeMipLevel(
***************************************************************************************************
*/
ADDR_E_RETURNCODE AddrLib1::HwlSetupTileCfg(
+ UINT_32 bpp, ///< Bits per pixel
INT_32 index, ///< [in] Tile index
INT_32 macroModeIndex, ///< [in] Index in macro tile mode table(CI)
ADDR_TILEINFO* pInfo, ///< [out] Tile Info
diff --git a/src/amd/addrlib/core/addrlib1.h b/src/amd/addrlib/core/addrlib1.h
index 9e216840d21..1bdfd5bf8f2 100644
--- a/src/amd/addrlib/core/addrlib1.h
+++ b/src/amd/addrlib/core/addrlib1.h
@@ -436,7 +436,7 @@ protected:
/// Overwrite tile config according to tile index
virtual ADDR_E_RETURNCODE HwlSetupTileCfg(
- INT_32 index, INT_32 macroModeIndex,
+ UINT_32 bpp, INT_32 index, INT_32 macroModeIndex,
ADDR_TILEINFO* pInfo, AddrTileMode* mode = NULL, AddrTileType* type = NULL) const;
/// Overwrite macro tile config according to tile index
diff --git a/src/amd/addrlib/r800/ciaddrlib.cpp b/src/amd/addrlib/r800/ciaddrlib.cpp
index 64fa66941ff..f72f5a26935 100644
--- a/src/amd/addrlib/r800/ciaddrlib.cpp
+++ b/src/amd/addrlib/r800/ciaddrlib.cpp
@@ -542,6 +542,7 @@ INT_32 CiAddrLib::HwlPostCheckTileIndex(
***************************************************************************************************
*/
ADDR_E_RETURNCODE CiAddrLib::HwlSetupTileCfg(
+ UINT_32 bpp, ///< [in] Bits per pixel
INT_32 index, ///< [in] Tile index
INT_32 macroModeIndex, ///< [in] Index in macro tile mode table(CI)
ADDR_TILEINFO* pInfo, ///< [out] Tile Info
@@ -566,23 +567,37 @@ ADDR_E_RETURNCODE CiAddrLib::HwlSetupTileCfg(
{
if (IsMacroTiled(pCfgTable->mode))
{
- ADDR_ASSERT(((macroModeIndex != TileIndexInvalid)
- && (macroModeIndex != TileIndexNoMacroIndex)));
- // Here we used tile_bytes to replace of tile_split
- // According info as below:
- // "tile_split_c = MIN(ROW_SIZE, tile_split)
- // "tile_bytes = MIN(tile_split_c, num_samples * tile_bytes_1x)
- // when using tile_bytes replacing of tile_split, the result of
- // alignment and others(such as slicesPerTile) are unaffected -
- // since if tile_split_c is larger, split won't happen, otherwise
- // (num_samples * tile_bytes_1x is larger), a correct tile_split is
- // returned.
+ ADDR_ASSERT((macroModeIndex != TileIndexInvalid) &&
+ (macroModeIndex != TileIndexNoMacroIndex));
+
+ UINT_32 tileSplit;
+
*pInfo = m_macroTileTable[macroModeIndex];
if (pCfgTable->type == ADDR_DEPTH_SAMPLE_ORDER)
{
- pInfo->tileSplitBytes = pCfgTable->info.tileSplitBytes;
+ tileSplit = pCfgTable->info.tileSplitBytes;
}
+ else
+ {
+ if (bpp > 0)
+ {
+ UINT_32 thickness = ComputeSurfaceThickness(pCfgTable->mode);
+ UINT_32 tileBytes1x = BITS_TO_BYTES(bpp * MicroTilePixels * thickness);
+ // Non-depth entries store a split factor
+ UINT_32 sampleSplit = m_tileTable[index].info.tileSplitBytes;
+ tileSplit = Max(256u, sampleSplit * tileBytes1x);
+ }
+ else
+ {
+ // Return tileBytes instead if not enough info
+ tileSplit = pInfo->tileSplitBytes;
+ }
+ }
+
+ // Clamp to row_size
+ pInfo->tileSplitBytes = Min(m_rowSize, tileSplit);
+
pInfo->pipeConfig = pCfgTable->info.pipeConfig;
}
else // 1D and linear modes, we return default value stored in table
diff --git a/src/amd/addrlib/r800/ciaddrlib.h b/src/amd/addrlib/r800/ciaddrlib.h
index 92997a5b46f..1e3dc567125 100644
--- a/src/amd/addrlib/r800/ciaddrlib.h
+++ b/src/amd/addrlib/r800/ciaddrlib.h
@@ -105,7 +105,7 @@ protected:
const ADDR_CREATE_INPUT* pCreateIn);
virtual ADDR_E_RETURNCODE HwlSetupTileCfg(
- INT_32 index, INT_32 macroModeIndex, ADDR_TILEINFO* pInfo,
+ UINT_32 bpp, INT_32 index, INT_32 macroModeIndex, ADDR_TILEINFO* pInfo,
AddrTileMode* pMode = 0, AddrTileType* pType = 0) const;
virtual VOID HwlComputeTileDataWidthAndHeightLinear(
diff --git a/src/amd/addrlib/r800/siaddrlib.cpp b/src/amd/addrlib/r800/siaddrlib.cpp
index 869cc56c1fe..296391ab46f 100644
--- a/src/amd/addrlib/r800/siaddrlib.cpp
+++ b/src/amd/addrlib/r800/siaddrlib.cpp
@@ -2443,6 +2443,7 @@ INT_32 SiAddrLib::HwlPostCheckTileIndex(
***************************************************************************************************
*/
ADDR_E_RETURNCODE SiAddrLib::HwlSetupTileCfg(
+ UINT_32 bpp, ///< [in] Bits per pixel
INT_32 index, ///< [in] Tile index
INT_32 macroModeIndex, ///< [in] Index in macro tile mode table(CI)
ADDR_TILEINFO* pInfo, ///< [out] Tile Info
diff --git a/src/amd/addrlib/r800/siaddrlib.h b/src/amd/addrlib/r800/siaddrlib.h
index 50373ccec75..9201fb220fd 100644
--- a/src/amd/addrlib/r800/siaddrlib.h
+++ b/src/amd/addrlib/r800/siaddrlib.h
@@ -120,7 +120,7 @@ protected:
const ADDR_CREATE_INPUT* pCreateIn);
virtual ADDR_E_RETURNCODE HwlSetupTileCfg(
- INT_32 index, INT_32 macroModeIndex,
+ UINT_32 bpp, INT_32 index, INT_32 macroModeIndex,
ADDR_TILEINFO* pInfo, AddrTileMode* pMode = 0, AddrTileType* pType = 0) const;
virtual VOID HwlComputeTileDataWidthAndHeightLinear(