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authorMatt Turner <[email protected]>2016-05-24 13:06:36 -0700
committerMatt Turner <[email protected]>2016-05-25 12:44:34 -0700
commit83c6749ddb9bb767e754aa886cdc872af0557898 (patch)
tree44e86d021ee9d441a8c425f272c83bbe6aa761fc /src
parent4a5e92ac705e1dcc4abf53f67300217e95e755da (diff)
i965: Assert that a depth_mt exists when using HiZ.
Reviewed-by: Anuj Phogat <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i965/brw_misc_state.c1
-rw-r--r--src/mesa/drivers/dri/i965/gen6_depth_state.c1
-rw-r--r--src/mesa/drivers/dri/i965/gen7_misc_state.c1
-rw-r--r--src/mesa/drivers/dri/i965/gen8_depth_state.c1
4 files changed, 4 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
index 5510d2c36f4..690c2f65fd9 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -646,6 +646,7 @@ brw_emit_depth_stencil_hiz(struct brw_context *brw,
/* Emit hiz buffer. */
if (hiz) {
+ assert(depth_mt);
struct intel_mipmap_tree *hiz_mt = depth_mt->hiz_buf->mt;
BEGIN_BATCH(3);
OUT_BATCH((_3DSTATE_HIER_DEPTH_BUFFER << 16) | (3 - 2));
diff --git a/src/mesa/drivers/dri/i965/gen6_depth_state.c b/src/mesa/drivers/dri/i965/gen6_depth_state.c
index febd4781100..1a29860580d 100644
--- a/src/mesa/drivers/dri/i965/gen6_depth_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_depth_state.c
@@ -160,6 +160,7 @@ gen6_emit_depth_stencil_hiz(struct brw_context *brw,
/* Emit hiz buffer. */
if (hiz) {
+ assert(depth_mt);
struct intel_mipmap_tree *hiz_mt = depth_mt->hiz_buf->mt;
uint32_t offset = 0;
diff --git a/src/mesa/drivers/dri/i965/gen7_misc_state.c b/src/mesa/drivers/dri/i965/gen7_misc_state.c
index 321c425dd47..ffdf6f22e62 100644
--- a/src/mesa/drivers/dri/i965/gen7_misc_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_misc_state.c
@@ -145,6 +145,7 @@ gen7_emit_depth_stencil_hiz(struct brw_context *brw,
OUT_BATCH(0);
ADVANCE_BATCH();
} else {
+ assert(depth_mt);
struct intel_miptree_aux_buffer *hiz_buf = depth_mt->hiz_buf;
BEGIN_BATCH(3);
diff --git a/src/mesa/drivers/dri/i965/gen8_depth_state.c b/src/mesa/drivers/dri/i965/gen8_depth_state.c
index 0eb993fcd7b..a780da6b376 100644
--- a/src/mesa/drivers/dri/i965/gen8_depth_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_depth_state.c
@@ -90,6 +90,7 @@ emit_depth_packets(struct brw_context *brw,
OUT_BATCH(0);
ADVANCE_BATCH();
} else {
+ assert(depth_mt);
BEGIN_BATCH(5);
OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER << 16 | (5 - 2));
OUT_BATCH((depth_mt->hiz_buf->pitch - 1) | mocs_wb << 25);