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authorMarek Olšák <[email protected]>2015-09-02 19:05:09 +0200
committerMarek Olšák <[email protected]>2015-09-10 17:14:15 +0200
commit7956eae1c76e298ca1ded46679c1a9bf875ec4ee (patch)
treeca955f43915eb9db335e1e06f5d5cca96a245132 /src
parentc6502e880bba00f8a68f004fe6be7a4bc275494a (diff)
radeonsi: enable VGPR spilling on VI
This fixes corruption in Unigine Heaven on VI Cc: 11.0 <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/radeonsi/si_pipe.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 7dbb2e30422..85ade311c9c 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -205,9 +205,7 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen,
r600_target = radeon_llvm_get_r600_target(triple);
sctx->tm = LLVMCreateTargetMachine(r600_target, triple,
r600_get_llvm_processor_name(sscreen->b.family),
- sctx->b.chip_class >= VI ?
- "+DumpCode" :
- "+DumpCode,+vgpr-spilling",
+ "+DumpCode,+vgpr-spilling",
LLVMCodeGenLevelDefault,
LLVMRelocDefault,
LLVMCodeModelDefault);