diff options
author | Matt Turner <[email protected]> | 2013-09-26 13:38:11 -0700 |
---|---|---|
committer | Matt Turner <[email protected]> | 2013-10-07 10:43:19 -0700 |
commit | 6ff8f0630833396fb7aff266657d4e1a04400719 (patch) | |
tree | dae17d5c3df68cdbfdac8799fc528aba585a8fba /src | |
parent | 06e41a02a3564b00404dd3dd5d6f6b5897df36e9 (diff) |
i965/fs: Disable CSE on instructions writing to HW_REG.
CSE would otherwise combine the two mul(8) emitted by [iu]mulExtended:
mul(8) acc0 x y
mach(8) null x y
mov(8) lsb acc0
...
mul(8) acc0 x y
mach(8) msb x y
Into:
mul(8) temp x y
mov(8) acc0 temp
mach(8) null x y
mov(8) lsb acc0
...
mov(8) acc0 temp
mach(8) msb x y
But mul(8) into the accumulator produces more than 32-bits of precision,
which is required and lost if multiplying into a general register and
moving to the accumulator.
Reviewed-by: Eric Anholt <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_cse.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp index ccd4e5edd1e..61b3aeb5ac1 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp @@ -98,7 +98,8 @@ fs_visitor::opt_cse_local(bblock_t *block, exec_list *aeb) if (is_expression(inst) && !inst->predicate && !inst->is_partial_write() && - !inst->conditional_mod) + !inst->conditional_mod && + inst->dst.file != HW_REG) { bool found = false; |