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authorKenneth Graunke <[email protected]>2013-01-21 21:24:34 -0800
committerKenneth Graunke <[email protected]>2013-01-24 15:19:08 -0800
commitfce9e5d41bb1d80885d430d0484e9bd46d8ab936 (patch)
treef1807f8db522a2973fe85b9ea8741930123c47b2 /src
parent0412864ae83c0a73b611c81611643994076d503c (diff)
i965/vs: Do headerless texturing for texelFetchOffset().
For texelFetchOffset(), we just add the texel offsets to the coordinate rather than using the message header's offset fields. So we don't actually need a header on Gen5+. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index ebf8990e64b..d9ff869f2da 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -1999,8 +1999,10 @@ vec4_visitor::visit(ir_texture *ir)
assert(!"TXB is not valid for vertex shaders.");
}
+ bool use_texture_offset = ir->offset != NULL && ir->op != ir_txf;
+
/* Texel offsets go in the message header; Gen4 also requires headers. */
- inst->header_present = ir->offset || intel->gen < 5;
+ inst->header_present = use_texture_offset || intel->gen < 5;
inst->base_mrf = 2;
inst->mlen = inst->header_present + 1; /* always at least one */
inst->sampler = sampler;
@@ -2008,7 +2010,7 @@ vec4_visitor::visit(ir_texture *ir)
inst->dst.writemask = WRITEMASK_XYZW;
inst->shadow_compare = ir->shadow_comparitor != NULL;
- if (ir->offset != NULL && ir->op != ir_txf)
+ if (use_texture_offset)
inst->texture_offset = brw_texture_offset(ir->offset->as_constant());
/* MRF for the first parameter */