diff options
| author | Jason Ekstrand <[email protected]> | 2016-03-08 10:25:00 -0800 |
|---|---|---|
| committer | Jason Ekstrand <[email protected]> | 2016-03-08 15:40:11 -0800 |
| commit | dc504a51fb47d1b4a12011cb1986c3897fad007f (patch) | |
| tree | 1074722f330bf0b6785d0e976011b45162f940fb /src | |
| parent | cce65471b8667e1752754c53361031cded5b39d1 (diff) | |
anv/pipeline: Unconditionally emit PS_BLEND on gen8+
Special-casing the PS_BLEND packet wasn't really gaining us anything. It's
defined to be more-or-less the contents of blend state entry 0 only without
the indirection. We can just copy-and-paste the contents. If there are no
valid color targets, then blend state 0 will be 0-initialized anyway so
it's basically the same as the special case we had before.
Diffstat (limited to 'src')
| -rw-r--r-- | src/intel/vulkan/gen8_pipeline.c | 32 |
1 files changed, 14 insertions, 18 deletions
diff --git a/src/intel/vulkan/gen8_pipeline.c b/src/intel/vulkan/gen8_pipeline.c index 71705d23200..b8b29d46b8a 100644 --- a/src/intel/vulkan/gen8_pipeline.c +++ b/src/intel/vulkan/gen8_pipeline.c @@ -189,24 +189,20 @@ emit_cb_state(struct anv_pipeline *pipeline, } } - if (info->attachmentCount > 0) { - struct GENX(BLEND_STATE_ENTRY) *bs = &blend_state.Entry[0]; - - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_PS_BLEND), - .AlphaToCoverageEnable = blend_state.AlphaToCoverageEnable, - .HasWriteableRT = has_writeable_rt, - .ColorBufferBlendEnable = bs->ColorBufferBlendEnable, - .SourceAlphaBlendFactor = bs->SourceAlphaBlendFactor, - .DestinationAlphaBlendFactor = - bs->DestinationAlphaBlendFactor, - .SourceBlendFactor = bs->SourceBlendFactor, - .DestinationBlendFactor = bs->DestinationBlendFactor, - .AlphaTestEnable = false, - .IndependentAlphaBlendEnable = - blend_state.IndependentAlphaBlendEnable); - } else { - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_PS_BLEND)); - } + struct GENX(BLEND_STATE_ENTRY) *bs0 = &blend_state.Entry[0]; + + anv_batch_emit(&pipeline->batch, GENX(3DSTATE_PS_BLEND), + .AlphaToCoverageEnable = blend_state.AlphaToCoverageEnable, + .HasWriteableRT = has_writeable_rt, + .ColorBufferBlendEnable = bs0->ColorBufferBlendEnable, + .SourceAlphaBlendFactor = bs0->SourceAlphaBlendFactor, + .DestinationAlphaBlendFactor = + bs0->DestinationAlphaBlendFactor, + .SourceBlendFactor = bs0->SourceBlendFactor, + .DestinationBlendFactor = bs0->DestinationBlendFactor, + .AlphaTestEnable = false, + .IndependentAlphaBlendEnable = + blend_state.IndependentAlphaBlendEnable); GENX(BLEND_STATE_pack)(NULL, pipeline->blend_state.map, &blend_state); if (!device->info.has_llc) |