diff options
author | Topi Pohjolainen <topi.pohjolainen@intel.com> | 2016-07-13 11:03:54 +0300 |
---|---|---|
committer | Topi Pohjolainen <topi.pohjolainen@intel.com> | 2016-07-13 12:10:03 +0300 |
commit | 7d29fee4a8c5648bdd7b3af45ad1e38b0a058a0e (patch) | |
tree | ce804fcfe55546a3826fa0b70eaf71f214bc34fd /src | |
parent | 26778da5716b2f3ad1f2ca5881b4ed500306b035 (diff) |
i965/blorp: Cleanup leftovers from push constant disabling
Setup for pixel shader push constants is the same as for other
stages. Note that on gen8+ the if-else branches were identical
and the generation check for packet size redundant.
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Diffstat (limited to 'src')
-rw-r--r-- | src/mesa/drivers/dri/i965/gen7_blorp.c | 27 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/gen8_blorp.c | 50 |
2 files changed, 12 insertions, 65 deletions
diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.c b/src/mesa/drivers/dri/i965/gen7_blorp.c index abdc4be14c8..72ab08232cb 100644 --- a/src/mesa/drivers/dri/i965/gen7_blorp.c +++ b/src/mesa/drivers/dri/i965/gen7_blorp.c @@ -233,7 +233,7 @@ gen7_blorp_emit_surface_state(struct brw_context *brw, * buffer are valid. */ static void -gen7_blorp_emit_disable_constant_state(struct brw_context *brw, +gen7_blorp_disable_constant_state(struct brw_context *brw, unsigned opcode) { BEGIN_BATCH(7); @@ -570,20 +570,6 @@ gen7_blorp_emit_sampler_state_pointers_ps(struct brw_context *brw, ADVANCE_BATCH(); } -void -gen7_blorp_emit_constant_ps_disable(struct brw_context *brw) -{ - BEGIN_BATCH(7); - OUT_BATCH(_3DSTATE_CONSTANT_PS << 16 | (7 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - static void gen7_blorp_emit_depth_stencil_config(struct brw_context *brw, const struct brw_blorp_params *params) @@ -779,10 +765,11 @@ gen7_blorp_exec(struct brw_context *brw, gen7_blorp_emit_cc_state_pointer(brw, cc_state_offset); } - gen7_blorp_emit_disable_constant_state(brw, _3DSTATE_CONSTANT_VS); - gen7_blorp_emit_disable_constant_state(brw, _3DSTATE_CONSTANT_HS); - gen7_blorp_emit_disable_constant_state(brw, _3DSTATE_CONSTANT_DS); - gen7_blorp_emit_disable_constant_state(brw, _3DSTATE_CONSTANT_GS); + gen7_blorp_disable_constant_state(brw, _3DSTATE_CONSTANT_VS); + gen7_blorp_disable_constant_state(brw, _3DSTATE_CONSTANT_HS); + gen7_blorp_disable_constant_state(brw, _3DSTATE_CONSTANT_DS); + gen7_blorp_disable_constant_state(brw, _3DSTATE_CONSTANT_GS); + gen7_blorp_disable_constant_state(brw, _3DSTATE_CONSTANT_PS); depthstencil_offset = gen6_blorp_emit_depth_stencil_state(brw, params); gen7_blorp_emit_depth_stencil_state_pointers(brw, depthstencil_offset); @@ -821,8 +808,6 @@ gen7_blorp_exec(struct brw_context *brw, if (params->wm_prog_data) gen7_blorp_emit_binding_table_pointers_ps(brw, wm_bind_bo_offset); - gen7_blorp_emit_constant_ps_disable(brw); - if (params->src.mt) { const uint32_t sampler_offset = gen6_blorp_emit_sampler_state(brw, BRW_MAPFILTER_LINEAR, 0, true); diff --git a/src/mesa/drivers/dri/i965/gen8_blorp.c b/src/mesa/drivers/dri/i965/gen8_blorp.c index 21fcd9e0e15..f68aba5b402 100644 --- a/src/mesa/drivers/dri/i965/gen8_blorp.c +++ b/src/mesa/drivers/dri/i965/gen8_blorp.c @@ -161,7 +161,7 @@ gen8_blorp_emit_blend_state(struct brw_context *brw, * buffer are valid. */ static void -gen8_blorp_emit_disable_constant_state(struct brw_context *brw, +gen8_blorp_disable_constant_state(struct brw_context *brw, unsigned opcode) { BEGIN_BATCH(11); @@ -566,44 +566,6 @@ gen8_blorp_emit_depth_stencil_state(struct brw_context *brw, ADVANCE_BATCH(); } -static void -gen8_blorp_emit_disable_constant_ps(struct brw_context *brw) -{ - const int dwords = brw->gen >= 8 ? 11 : 7; - BEGIN_BATCH(dwords); - OUT_BATCH(_3DSTATE_CONSTANT_PS << 16 | (dwords - 2)); - - if (brw->gen >= 9) { - OUT_BATCH(0); - OUT_BATCH(0); - } else { - OUT_BATCH(0); - OUT_BATCH(0); - } - - if (brw->gen >= 9) { - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - } else { - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - } - - ADVANCE_BATCH(); -} - static uint32_t gen8_blorp_emit_surface_states(struct brw_context *brw, const struct brw_blorp_params *params) @@ -680,12 +642,12 @@ gen8_blorp_exec(struct brw_context *brw, const struct brw_blorp_params *params) const uint32_t cc_state_offset = gen6_blorp_emit_cc_state(brw); gen7_blorp_emit_cc_state_pointer(brw, cc_state_offset); - gen8_blorp_emit_disable_constant_state(brw, _3DSTATE_CONSTANT_VS); - gen8_blorp_emit_disable_constant_state(brw, _3DSTATE_CONSTANT_HS); - gen8_blorp_emit_disable_constant_state(brw, _3DSTATE_CONSTANT_DS); - gen8_blorp_emit_disable_constant_state(brw, _3DSTATE_CONSTANT_GS); + gen8_blorp_disable_constant_state(brw, _3DSTATE_CONSTANT_VS); + gen8_blorp_disable_constant_state(brw, _3DSTATE_CONSTANT_HS); + gen8_blorp_disable_constant_state(brw, _3DSTATE_CONSTANT_DS); + gen8_blorp_disable_constant_state(brw, _3DSTATE_CONSTANT_GS); + gen8_blorp_disable_constant_state(brw, _3DSTATE_CONSTANT_PS); - gen8_blorp_emit_disable_constant_ps(brw); wm_bind_bo_offset = gen8_blorp_emit_surface_states(brw, params); gen7_blorp_emit_binding_table_pointers_ps(brw, wm_bind_bo_offset); |