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authorKenneth Graunke <[email protected]>2012-03-30 13:58:06 -0700
committerKenneth Graunke <[email protected]>2012-03-30 14:27:54 -0700
commit01044fce6b3de11635ea5078b76ffee1a33b3802 (patch)
tree7c237b2a3d4e7a5f876339d18cf1edb38f93bc06 /src
parent99a192ce7d8690f44a1f23a432607b6ce5031942 (diff)
i965: Avoid explicit accumulator operands in SIMD16 mode on Gen7.
According to the BSpec ISA volume's "Accumulator Register" section: "[DevIVB] SIMD16 execution on dwords is not allowed when accumulator is explicit source or destination operand." Fixes piglit tests: - fs-multiply-const-ivec4 - fs-multiply-const-uvec4 - fs-multiply-ivec4-const - fs-multiply-uvec4-const Signed-off-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs_visitor.cpp3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index b4ef80b6546..a672ee624b2 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -337,6 +337,9 @@ fs_visitor::visit(ir_expression *ir)
* FINISHME: Emit just the MUL if we know an operand is small
* enough.
*/
+ if (intel->gen >= 7 && c->dispatch_width == 16)
+ fail("16-wide explicit accumulator operands unsupported\n");
+
struct brw_reg acc = retype(brw_acc_reg(), BRW_REGISTER_TYPE_D);
emit(BRW_OPCODE_MUL, acc, op[0], op[1]);