diff options
author | Eric Anholt <[email protected]> | 2011-10-10 13:50:41 -0700 |
---|---|---|
committer | Eric Anholt <[email protected]> | 2011-12-23 22:02:25 -0800 |
commit | 8f0baace9854c5a476e348f31a7c45d6366e7532 (patch) | |
tree | 6bca1ace50bc6036f374e7f19a1aa751d64a0a35 /src | |
parent | e1425a54b119363bf038ec2e1636986980bba77d (diff) |
i965/gen7: Move SOL stage disable to gen7_sol_state.c
We'll be growing more code in here as we actually enable the unit.
Reviewed-by: Kenneth Graunke <[email protected]>
Reviewed-by: Paul Berry <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/mesa/drivers/dri/i965/Makefile.sources | 1 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_state_upload.c | 1 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/gen7_disable.c | 7 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/gen7_sol_state.c | 56 |
4 files changed, 58 insertions, 7 deletions
diff --git a/src/mesa/drivers/dri/i965/Makefile.sources b/src/mesa/drivers/dri/i965/Makefile.sources index e50f9c3f95f..3eeac6f91b2 100644 --- a/src/mesa/drivers/dri/i965/Makefile.sources +++ b/src/mesa/drivers/dri/i965/Makefile.sources @@ -104,6 +104,7 @@ i965_C_SOURCES := \ gen7_misc_state.c \ gen7_sampler_state.c \ gen7_sf_state.c \ + gen7_sol_state.c \ gen7_urb.c \ gen7_viewport_state.c \ gen7_vs_state.c \ diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c index a8bda5a7d98..7ea5e21b3a4 100644 --- a/src/mesa/drivers/dri/i965/brw_state_upload.c +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c @@ -220,6 +220,7 @@ const struct brw_tracked_state *gen7_atoms[] = &gen7_disable_stages, &gen7_vs_state, + &gen7_sol_state, &gen7_clip_state, &gen7_sbe_state, &gen7_sf_state, diff --git a/src/mesa/drivers/dri/i965/gen7_disable.c b/src/mesa/drivers/dri/i965/gen7_disable.c index a44d31596b9..b37aa6cd460 100644 --- a/src/mesa/drivers/dri/i965/gen7_disable.c +++ b/src/mesa/drivers/dri/i965/gen7_disable.c @@ -122,13 +122,6 @@ disable_stages(struct brw_context *brw) OUT_BATCH(_3DSTATE_BINDING_TABLE_POINTERS_DS << 16 | (2 - 2)); OUT_BATCH(0); ADVANCE_BATCH(); - - /* Disable the SOL stage */ - BEGIN_BATCH(3); - OUT_BATCH(_3DSTATE_STREAMOUT << 16 | (3 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); } const struct brw_tracked_state gen7_disable_stages = { diff --git a/src/mesa/drivers/dri/i965/gen7_sol_state.c b/src/mesa/drivers/dri/i965/gen7_sol_state.c new file mode 100644 index 00000000000..fcda08dde4f --- /dev/null +++ b/src/mesa/drivers/dri/i965/gen7_sol_state.c @@ -0,0 +1,56 @@ +/* + * Copyright © 2011 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +/** + * @file gen7_sol_state.c + * + * Controls the stream output logic (SOL) stage of the gen7 hardware, which is + * used to implement GL_EXT_transform_feedback. + */ + +#include "brw_context.h" +#include "brw_state.h" +#include "brw_defines.h" +#include "intel_batchbuffer.h" + +static void +upload_sol_state(struct brw_context *brw) +{ + struct intel_context *intel = &brw->intel; + + /* Disable the SOL stage */ + BEGIN_BATCH(3); + OUT_BATCH(_3DSTATE_STREAMOUT << 16 | (3 - 2)); + OUT_BATCH(0); + OUT_BATCH(0); + ADVANCE_BATCH(); +} + +const struct brw_tracked_state gen7_sol_state = { + .dirty = { + .mesa = 0, + .brw = BRW_NEW_BATCH, + .cache = 0, + }, + .emit = upload_sol_state, +}; |