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authorJerome Glisse <[email protected]>2013-02-06 15:03:17 -0500
committerJerome Glisse <[email protected]>2013-02-11 18:44:18 -0500
commit323a4488250f8f4e9981623b795763b86f5cae3f (patch)
treebdf1886233eb000753fd1352645ebff4bf476a2e /src
parenta37835c8eda017f0c955e0927e7418e7f3ba3b73 (diff)
r600g: make sure async blit is done 8 * pitch at a time v2
The blit must be aligned on 8 horizontal block. v2: no need to align the reminder Signed-off-by: Jerome Glisse <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/r600/r600_state.c13
1 files changed, 7 insertions, 6 deletions
diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index 67c4d99f213..532285024f1 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -3068,14 +3068,15 @@ static boolean r600_dma_copy_tile(struct r600_context *rctx,
return FALSE;
}
- size = (copy_height * pitch) >> 2;
- ncopy = (size / 0x0000ffff) + !!(size % 0x0000ffff);
+ /* It's a r6xx/r7xx limitation, the blit must be on 8 boundary for number
+ * line in the blit. Compute max 8 line we can copy in the size limit
+ */
+ cheight = ((0x0000ffff << 2) / pitch) & 0xfffffff8;
+ ncopy = (copy_height / cheight) + !!(copy_height % cheight);
r600_need_dma_space(rctx, ncopy * 7);
+
for (i = 0; i < ncopy; i++) {
- cheight = copy_height;
- if (((cheight * pitch) >> 2) > 0x0000ffff) {
- cheight = (0x0000ffff << 2) / pitch;
- }
+ cheight = cheight > copy_height ? copy_height : cheight;
size = (cheight * pitch) >> 2;
/* emit reloc before writting cs so that cs is always in consistent state */
r600_context_bo_reloc(rctx, &rctx->rings.dma, &rsrc->resource, RADEON_USAGE_READ);