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authorEric Anholt <[email protected]>2011-03-23 12:36:52 -0700
committerEric Anholt <[email protected]>2011-04-26 12:19:59 -0700
commitb943b9b1a696cf51adfb2a18bcb9cf503fb2737f (patch)
tree1621ccb179a30995829ad1f754279e4f56f64f44 /src
parent9c57780dc0604f871650c5d23c06d627d964d803 (diff)
i965/fs: Add a little whitespace between shader dumping debug.
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs.cpp6
1 files changed, 5 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 2784e0d96bc..5a643a94200 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -3904,6 +3904,10 @@ fs_visitor::generate_code()
last_native_inst = p->nr_insn;
}
+ if (unlikely(INTEL_DEBUG & DEBUG_WM)) {
+ printf("\n");
+ }
+
ralloc_free(if_stack);
ralloc_free(loop_stack);
ralloc_free(if_depth_in_loop);
@@ -4050,7 +4054,7 @@ brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_compile *c)
if (unlikely(INTEL_DEBUG & DEBUG_WM)) {
printf("GLSL IR for native fragment shader %d:\n", prog->Name);
_mesa_print_ir(shader->ir, NULL);
- printf("\n");
+ printf("\n\n");
}
/* Now the main event: Visit the shader IR and generate our FS IR for it.