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authorBrian Paul <[email protected]>2009-10-21 21:12:23 -0600
committerBrian Paul <[email protected]>2009-10-21 21:14:44 -0600
commitc18b022d0d1dc07c37c0bd981d4fc6fac27e5a45 (patch)
tree7482aba5befe4ca06bc3338334cd6f15a67ae323 /src
parent68d94a608a6d46156a567b8f0e011ac58054975e (diff)
radeon: replace MESA_FORMAT_Z24_S8 with MESA_FORMAT_S8_Z24
Core Mesa deals with MESA_FORMAT_S8_Z24 everywhere it should so we shouldn't have to use MESA_FORMAT_Z24_S8 anymore.
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/r300/r300_texstate.c2
-rw-r--r--src/mesa/drivers/dri/r600/r600_texstate.c6
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_span.c4
3 files changed, 6 insertions, 6 deletions
diff --git a/src/mesa/drivers/dri/r300/r300_texstate.c b/src/mesa/drivers/dri/r300/r300_texstate.c
index 1e9bd3e8493..63f0154cd35 100644
--- a/src/mesa/drivers/dri/r300/r300_texstate.c
+++ b/src/mesa/drivers/dri/r300/r300_texstate.c
@@ -159,7 +159,7 @@ void r300SetDepthTexMode(struct gl_texture_object *tObj)
case MESA_FORMAT_Z16:
format = formats[0];
break;
- case MESA_FORMAT_Z24_S8:
+ case MESA_FORMAT_S8_Z24:
format = formats[1];
break;
case MESA_FORMAT_Z32:
diff --git a/src/mesa/drivers/dri/r600/r600_texstate.c b/src/mesa/drivers/dri/r600/r600_texstate.c
index 35186ef9704..63d88f83d6f 100644
--- a/src/mesa/drivers/dri/r600/r600_texstate.c
+++ b/src/mesa/drivers/dri/r600/r600_texstate.c
@@ -77,7 +77,7 @@ void r600UpdateTextureState(GLcontext * ctx)
}
}
-static GLboolean r600GetTexFormat(struct gl_texture_object *tObj, GLuint mesa_format)
+static GLboolean r600GetTexFormat(struct gl_texture_object *tObj, gl_format mesa_format)
{
radeonTexObj *t = radeon_tex_obj(tObj);
@@ -479,14 +479,14 @@ static GLboolean r600GetTexFormat(struct gl_texture_object *tObj, GLuint mesa_fo
SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
break;
case MESA_FORMAT_Z16:
- case MESA_FORMAT_Z24_S8:
+ case MESA_FORMAT_S8_Z24:
case MESA_FORMAT_Z32:
switch (mesa_format) {
case MESA_FORMAT_Z16:
SETfield(t->SQ_TEX_RESOURCE1, FMT_16,
SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
break;
- case MESA_FORMAT_Z24_S8:
+ case MESA_FORMAT_S8_Z24:
SETfield(t->SQ_TEX_RESOURCE1, FMT_24_8,
SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
break;
diff --git a/src/mesa/drivers/dri/radeon/radeon_span.c b/src/mesa/drivers/dri/radeon/radeon_span.c
index 055f77a24b9..4b47e756c78 100644
--- a/src/mesa/drivers/dri/radeon/radeon_span.c
+++ b/src/mesa/drivers/dri/radeon/radeon_span.c
@@ -878,11 +878,11 @@ static void radeonSetSpanFunctions(struct radeon_renderbuffer *rrb)
radeonInitDepthPointers_z16(&rrb->base);
} else if (rrb->base.Format == GL_DEPTH_COMPONENT32) { /* XXX */
radeonInitDepthPointers_z24(&rrb->base);
- } else if (rrb->base.Format == MESA_FORMAT_Z24_S8) {
+ } else if (rrb->base.Format == MESA_FORMAT_S8_Z24) {
radeonInitDepthPointers_z24_s8(&rrb->base);
} else if (rrb->base.Format == MESA_FORMAT_S8) {
radeonInitStencilPointers_z24_s8(&rrb->base);
} else {
- fprintf(stderr, "radeonSetSpanFunctions: bad actual format: 0x%04X\n", rrb->base.Format);
+ fprintf(stderr, "radeonSetSpanFunctions: bad format: 0x%04X\n", rrb->base.Format);
}
}