diff options
| author | Anuj Phogat <[email protected]> | 2015-07-24 14:52:01 -0700 |
|---|---|---|
| committer | Anuj Phogat <[email protected]> | 2015-09-28 15:00:53 -0700 |
| commit | 945592f92ca91e21307d10b657835d512bacf8b8 (patch) | |
| tree | e0fc80cf6d0ca8b0681fe9b52d6a0b162df6bc8d /src | |
| parent | 1d8cba9b51b7a6e7dbf3f0d3f53b5c232fd0b5b2 (diff) | |
i965/gen9: Add a condition for starting pixel in fast copy blit
This condition restricts the use of fast copy blit to cases
where starting pixel of src and dst is oword (16 byte) aligned.
Many piglit tests (if using fast copy blit in Mesa) failed earlier
because I missed adding this condition.Fast copy blit is currently
enabled for use only with Yf/Ys tiling.
Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Chad Versace <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mesa/drivers/dri/i965/intel_blit.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c index 9184ad62e34..46fccc8d6ce 100644 --- a/src/mesa/drivers/dri/i965/intel_blit.c +++ b/src/mesa/drivers/dri/i965/intel_blit.c @@ -420,6 +420,10 @@ can_fast_copy_blit(struct brw_context *brw, dst_tr_mode == INTEL_MIPTREE_TRMODE_NONE) return false; + /* The start pixel for Fast Copy blit should be on an OWord boundary. */ + if ((dst_x * cpp | src_x * cpp) & 15) + return false; + /* For all surface types buffers must be cacheline-aligned. */ if ((dst_offset | src_offset) & 63) return false; |