diff options
| author | Eric Anholt <[email protected]> | 2019-02-13 13:42:41 -0800 |
|---|---|---|
| committer | Eric Anholt <[email protected]> | 2019-02-18 18:09:06 -0800 |
| commit | 6186a8d44e954c35b32cd9628bb2de7e4ab271a8 (patch) | |
| tree | 726c16bf7f8e530506ce7693f8eed020e55c3b39 /src | |
| parent | 718eef62cb7f3379ea6c64c68d58f5fa613f08ac (diff) | |
v3d: Do bool-to-cond for discard_if as well.
Turns this minimal conditional discard (glsl-fs-discard-01.shader_test):
0x3de0b086c5fe9000 fcmp.pushn -, r1, r5; mov r2, 0
0x3dec3086bbfc001f nop ; mov.ifa r2, -1
0x3c047186bbe80000 nop ; mov.pushz -, r2
0x3dea3186ba837000 setmsf.ifna -, 0 ; nop
into:
0x3c00b186c582a000 fcmp.pushn -, r2, r5; nop
0x3de83186ba837000 setmsf.ifa -, 0 ; nop
total instructions in shared programs: 6229820 -> 6226247 (-0.06%)
Diffstat (limited to 'src')
| -rw-r--r-- | src/broadcom/compiler/nir_to_vir.c | 28 |
1 files changed, 12 insertions, 16 deletions
diff --git a/src/broadcom/compiler/nir_to_vir.c b/src/broadcom/compiler/nir_to_vir.c index dbd612f6682..c0a606d8ef5 100644 --- a/src/broadcom/compiler/nir_to_vir.c +++ b/src/broadcom/compiler/nir_to_vir.c @@ -1897,26 +1897,22 @@ ntq_emit_intrinsic(struct v3d_compile *c, nir_intrinsic_instr *instr) break; case nir_intrinsic_discard_if: { - /* true (~0) if we're discarding */ - struct qreg cond = ntq_get_src(c, instr->src[0], 0); + enum v3d_qpu_cond cond = ntq_emit_bool_to_cond(c, instr->src[0]); if (c->execute.file != QFILE_NULL) { - /* execute == 0 means the channel is active. Invert - * the condition so that we can use zero as "executing - * and discarding." - */ - vir_PF(c, vir_OR(c, c->execute, vir_NOT(c, cond)), - V3D_QPU_PF_PUSHZ); - vir_set_cond(vir_SETMSF_dest(c, vir_nop_reg(), - vir_uniform_ui(c, 0)), - V3D_QPU_COND_IFA); - } else { - vir_PF(c, cond, V3D_QPU_PF_PUSHZ); - vir_set_cond(vir_SETMSF_dest(c, vir_nop_reg(), - vir_uniform_ui(c, 0)), - V3D_QPU_COND_IFNA); + struct qinst *exec_flag = vir_MOV_dest(c, vir_nop_reg(), + c->execute); + if (cond == V3D_QPU_COND_IFA) { + vir_set_uf(exec_flag, V3D_QPU_UF_ANDZ); + } else { + vir_set_uf(exec_flag, V3D_QPU_UF_NORNZ); + cond = V3D_QPU_COND_IFA; + } } + vir_set_cond(vir_SETMSF_dest(c, vir_nop_reg(), + vir_uniform_ui(c, 0)), cond); + break; } |