diff options
| author | Jason Ekstrand <[email protected]> | 2016-02-17 13:23:45 -0800 |
|---|---|---|
| committer | Jason Ekstrand <[email protected]> | 2016-02-17 18:04:39 -0800 |
| commit | d67d84f5e568feaa988bdda6a23c84aa34b8bbaf (patch) | |
| tree | 10220629a4876e7ab9a697b7e35d92eeca80e28b /src | |
| parent | 7c26d8d47174b19d91651c5eff3be9e71a004b24 (diff) | |
i965/nir: Do lower_io late for fragment shaders
Diffstat (limited to 'src')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs.cpp | 2 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_nir.c | 3 | ||||
| -rw-r--r-- | src/vulkan/anv_pipeline.c | 3 |
3 files changed, 6 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 7e161e8bb48..bb22cfa5fab 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -5606,6 +5606,8 @@ brw_compile_fs(const struct brw_compiler *compiler, void *log_data, nir_shader *shader = nir_shader_clone(mem_ctx, src_shader); shader = brw_nir_apply_sampler_key(shader, compiler->devinfo, &key->tex, true); + shader = brw_nir_lower_io(shader, compiler->devinfo, true, + false, NULL); shader = brw_postprocess_nir(shader, compiler->devinfo, true); /* key->alpha_test_func means simulating alpha testing via discards, diff --git a/src/mesa/drivers/dri/i965/brw_nir.c b/src/mesa/drivers/dri/i965/brw_nir.c index 44446694b4b..e9351a5556a 100644 --- a/src/mesa/drivers/dri/i965/brw_nir.c +++ b/src/mesa/drivers/dri/i965/brw_nir.c @@ -637,7 +637,8 @@ brw_create_nir(struct brw_context *brw, if (nir->stage != MESA_SHADER_VERTEX && nir->stage != MESA_SHADER_TESS_CTRL && - nir->stage != MESA_SHADER_TESS_EVAL) { + nir->stage != MESA_SHADER_TESS_EVAL && + nir->stage != MESA_SHADER_FRAGMENT) { nir = brw_nir_lower_io(nir, devinfo, is_scalar, false, NULL); } diff --git a/src/vulkan/anv_pipeline.c b/src/vulkan/anv_pipeline.c index 21df3e081a3..e6cc8faf4fc 100644 --- a/src/vulkan/anv_pipeline.c +++ b/src/vulkan/anv_pipeline.c @@ -390,7 +390,8 @@ anv_pipeline_compile(struct anv_pipeline *pipeline, /* Finish the optimization and compilation process */ if (nir->stage != MESA_SHADER_VERTEX && nir->stage != MESA_SHADER_TESS_CTRL && - nir->stage != MESA_SHADER_TESS_EVAL) { + nir->stage != MESA_SHADER_TESS_EVAL && + nir->stage != MESA_SHADER_FRAGMENT) { nir = brw_nir_lower_io(nir, &pipeline->device->info, compiler->scalar_stage[stage], false, NULL); } |