diff options
| author | Kenneth Graunke <[email protected]> | 2013-01-20 08:58:14 -0800 |
|---|---|---|
| committer | Kenneth Graunke <[email protected]> | 2013-12-02 13:25:32 -0800 |
| commit | bc9d3a02540e11b863a1f7e7cf755764a02233fe (patch) | |
| tree | 5b8c32def095c9f13ba1f4b1992e58223b1cba06 /src | |
| parent | 5720832f23f486e2c869ecb022a6a9ba47ac1619 (diff) | |
i965: Don't use MACH for integer multiplies on Gen8+.
The documentation is really hard to follow, but apparently a 32-bit x
32-bit multiply just works without the MACH macro. The macro apparently
is only necessary to get the full 64-bit value.
Fixes Piglit tests [vf]s-op-mult-int-int.shader_test.
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 2 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp index 9eb9a9d07ac..97776c86189 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp @@ -433,7 +433,7 @@ fs_visitor::visit(ir_expression *ir) break; case ir_binop_mul: - if (ir->type->is_integer()) { + if (brw->gen < 8 && ir->type->is_integer()) { /* For integer multiplication, the MUL uses the low 16 bits * of one of the operands (src0 on gen6, src1 on gen7). The * MACH accumulates in the contribution of the upper 16 bits diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp index 9c1975b3e5e..aece78015ad 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp @@ -1344,7 +1344,7 @@ vec4_visitor::visit(ir_expression *ir) break; case ir_binop_mul: - if (ir->type->is_integer()) { + if (brw->gen < 8 && ir->type->is_integer()) { /* For integer multiplication, the MUL uses the low 16 bits of one of * the operands (src0 through SNB, src1 on IVB and later). The MACH * accumulates in the contribution of the upper 16 bits of that |