diff options
author | Jordan Justen <[email protected]> | 2013-07-15 16:37:15 -0700 |
---|---|---|
committer | Jordan Justen <[email protected]> | 2013-08-04 11:52:37 -0700 |
commit | 20799c11eb8fbdd9adf0baf1d4d5a77c0deb68f3 (patch) | |
tree | 74a7b233c6549b2739023c6380401e9be66bfda9 /src | |
parent | bf25ee284045c5d2ddf3b2d234d7344187e6da29 (diff) |
hsw hiz: Remove x/y offset restriction for hiz
This restriction was related to programming the offset fields
of the depth buffer packet. We are now setting these offsets
to 0 now, so this restriction should no longer be required.
Signed-off-by: Jordan Justen <[email protected]>
Reviewed-by: Paul Berry <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 24 |
1 files changed, 0 insertions, 24 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index d6988e00191..900e1c2a063 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -1244,31 +1244,7 @@ intel_miptree_slice_enable_hiz(struct brw_context *brw, assert(mt->hiz_mt); if (brw->is_haswell) { - /* Disable HiZ for some slices to work around a hardware bug. - * - * Haswell hardware fails to respect - * 3DSTATE_DEPTH_BUFFER.Depth_Coordinate_Offset_X/Y when during HiZ - * ambiguate operations. The failure is inconsistent and affected by - * other GPU contexts. Running a heavy GPU workload in a separate - * process causes the failure rate to drop to nearly 0. - * - * To workaround the bug, we enable HiZ only when we can guarantee that - * the Depth Coordinate Offset fields will be set to 0. The function - * brw_get_depthstencil_tile_masks() is used to calculate the fields, - * and the function is sometimes called in such a way that the presence - * of an attached stencil buffer changes the fuction's return value. - * - * The largest tile size considered by brw_get_depthstencil_tile_masks() - * is that of the stencil buffer. Therefore, if this hiz slice's - * corresponding depth slice has an offset that is aligned to the - * stencil buffer tile size, 64x64 pixels, then - * 3DSTATE_DEPTH_BUFFER.Depth_Coordinate_Offset_X/Y is set to 0. - */ const struct intel_mipmap_level *l = &mt->level[level]; - const struct intel_mipmap_slice *s = &l->slice[layer]; - if ((s->x_offset & 63) || (s->y_offset & 63)) { - return false; - } /* Disable HiZ for LOD > 0 unless the width is 8 aligned * and the height is 4 aligned. This allows our HiZ support |