diff options
author | Ilia Mirkin <[email protected]> | 2014-04-25 01:43:05 -0400 |
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committer | Ilia Mirkin <[email protected]> | 2014-04-28 19:04:46 -0400 |
commit | a52eaba78737fd6473490ee8fe6a8415cd52ef98 (patch) | |
tree | 2184708689b714ad0650d993c2e68a8ecb5d3e8e /src | |
parent | b125c92aa9837c80d1b7e26554d0b66b4db3f2e1 (diff) |
gallium: add new opcodes for ARB_gs5 bit manipulation support
Signed-off-by: Ilia Mirkin <[email protected]>
Reviewed-by: Roland Scheidegger <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/gallium/auxiliary/tgsi/tgsi_info.c | 8 | ||||
-rw-r--r-- | src/gallium/docs/source/tgsi.rst | 75 | ||||
-rw-r--r-- | src/gallium/include/pipe/p_shader_tokens.h | 11 |
3 files changed, 93 insertions, 1 deletions
diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.c b/src/gallium/auxiliary/tgsi/tgsi_info.c index 5bcc3c918d3..d03a92065f2 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_info.c +++ b/src/gallium/auxiliary/tgsi/tgsi_info.c @@ -223,6 +223,14 @@ static const struct tgsi_opcode_info opcode_info[TGSI_OPCODE_LAST] = { 1, 2, 0, 0, 0, 0, COMP, "UMUL_HI", TGSI_OPCODE_UMUL_HI }, { 1, 3, 1, 0, 0, 0, OTHR, "TG4", TGSI_OPCODE_TG4 }, { 1, 2, 1, 0, 0, 0, OTHR, "LODQ", TGSI_OPCODE_LODQ }, + { 1, 3, 0, 0, 0, 0, COMP, "IBFE", TGSI_OPCODE_IBFE }, + { 1, 3, 0, 0, 0, 0, COMP, "UBFE", TGSI_OPCODE_UBFE }, + { 1, 4, 0, 0, 0, 0, COMP, "BFI", TGSI_OPCODE_BFI }, + { 1, 1, 0, 0, 0, 0, COMP, "BREV", TGSI_OPCODE_BREV }, + { 1, 1, 0, 0, 0, 0, COMP, "POPC", TGSI_OPCODE_POPC }, + { 1, 1, 0, 0, 0, 0, COMP, "LSB", TGSI_OPCODE_LSB }, + { 1, 1, 0, 0, 0, 0, COMP, "IMSB", TGSI_OPCODE_IMSB }, + { 1, 1, 0, 0, 0, 0, COMP, "UMSB", TGSI_OPCODE_UMSB }, }; const struct tgsi_opcode_info * diff --git a/src/gallium/docs/source/tgsi.rst b/src/gallium/docs/source/tgsi.rst index 0ea0759aa1c..9500b9d615e 100644 --- a/src/gallium/docs/source/tgsi.rst +++ b/src/gallium/docs/source/tgsi.rst @@ -1558,6 +1558,81 @@ Support for these opcodes indicated by PIPE_SHADER_CAP_INTEGERS (all of them?) dst.w = |src.w| +Bitwise ISA +^^^^^^^^^^^ +These opcodes are used for bit-level manipulation of integers. + +.. opcode:: IBFE - Signed Bitfield Extract + + See SM5 instruction of the same name. Extracts a set of bits from the input, + and sign-extends them if the high bit of the extracted window is set. + + Pseudocode:: + + def ibfe(value, offset, bits): + offset = offset & 0x1f + bits = bits & 0x1f + if bits == 0: return 0 + # Note: >> sign-extends + if width + offset < 32: + return (value << (32 - offset - bits)) >> (32 - bits) + else: + return value >> offset + +.. opcode:: UBFE - Unsigned Bitfield Extract + + See SM5 instruction of the same name. Extracts a set of bits from the input, + without any sign-extension. + + Pseudocode:: + + def ubfe(value, offset, bits): + offset = offset & 0x1f + bits = bits & 0x1f + if bits == 0: return 0 + # Note: >> does not sign-extend + if width + offset < 32: + return (value << (32 - offset - bits)) >> (32 - bits) + else: + return value >> offset + +.. opcode:: BFI - Bitfield Insert + + See SM5 instruction of the same name. Replaces a bit region of 'base' with + the low bits of 'insert'. + + Pseudocode:: + + def bfi(base, insert, offset, bits): + offset = offset & 0x1f + bits = bits & 0x1f + mask = ((1 << bits) - 1) << offset + return ((insert << offset) & mask) | (base & ~mask) + +.. opcode:: BREV - Bitfield Reverse + + See SM5 instruction BFREV. Reverses the bits of the argument. + +.. opcode:: POPC - Population Count + + See SM5 instruction COUNTBITS. Counts the number of set bits in the argument. + +.. opcode:: LSB - Index of lowest set bit + + See SM5 instruction FIRSTBIT_LO. Computes the 0-based index of the first set + bit of the argument. Returns -1 if none are set. + +.. opcode:: IMSB - Index of highest non-sign bit + + See SM5 instruction FIRSTBIT_SHI. Computes the 0-based index of the highest + non-sign bit of the argument (i.e. highest 0 bit for negative numbers, + highest 1 bit for positive numbers). Returns -1 if all bits are the same + (i.e. for inputs 0 and -1). + +.. opcode:: UMSB - Index of highest set bit + + See SM5 instruction FIRSTBIT_HI. Computes the 0-based index of the highest + set bit of the argument. Returns -1 if none are set. Geometry ISA ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ diff --git a/src/gallium/include/pipe/p_shader_tokens.h b/src/gallium/include/pipe/p_shader_tokens.h index b537166e93c..d095bd3a8f5 100644 --- a/src/gallium/include/pipe/p_shader_tokens.h +++ b/src/gallium/include/pipe/p_shader_tokens.h @@ -462,7 +462,16 @@ struct tgsi_property_data { #define TGSI_OPCODE_LODQ 183 -#define TGSI_OPCODE_LAST 184 +#define TGSI_OPCODE_IBFE 184 +#define TGSI_OPCODE_UBFE 185 +#define TGSI_OPCODE_BFI 186 +#define TGSI_OPCODE_BREV 187 +#define TGSI_OPCODE_POPC 188 +#define TGSI_OPCODE_LSB 189 +#define TGSI_OPCODE_IMSB 190 +#define TGSI_OPCODE_UMSB 191 + +#define TGSI_OPCODE_LAST 192 #define TGSI_SAT_NONE 0 /* do not saturate */ #define TGSI_SAT_ZERO_ONE 1 /* clamp to [0,1] */ |