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authorMarek Olšák <[email protected]>2012-01-28 04:25:31 +0100
committerMarek Olšák <[email protected]>2012-01-31 02:15:51 +0100
commit5345e3ea86a3e942ccef083019a76b38b05f3f14 (patch)
tree7fde2142ab06ec14300e1a2632f5863cfa584408 /src
parent177845daa150403311e51e3bdc27e5014d40e915 (diff)
r600g: don't use register mask for SQ_GPR_RESOURCE_MGMT_1
Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/r600/r600_pipe.h1
-rw-r--r--src/gallium/drivers/r600/r600_state.c4
2 files changed, 4 insertions, 1 deletions
diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h
index 7d0d697243d..b4898a4e0ef 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -188,6 +188,7 @@ struct r600_pipe_context {
struct blitter_context *blitter;
enum radeon_family family;
enum chip_class chip_class;
+ unsigned r6xx_num_clause_temp_gprs;
void *custom_dsa_flush;
struct r600_screen *screen;
struct radeon_winsys *ws;
diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index 26eb92a08f0..eeacf033317 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -1829,8 +1829,9 @@ void r600_adjust_gprs(struct r600_pipe_context *rctx)
tmp = 0;
tmp |= S_008C04_NUM_PS_GPRS(num_ps_gprs);
tmp |= S_008C04_NUM_VS_GPRS(num_vs_gprs);
+ tmp |= S_008C04_NUM_CLAUSE_TEMP_GPRS(rctx->r6xx_num_clause_temp_gprs);
rstate.nregs = 0;
- r600_pipe_state_add_reg(&rstate, R_008C04_SQ_GPR_RESOURCE_MGMT_1, tmp, 0x0FFFFFFF, NULL, 0);
+ r600_pipe_state_add_reg(&rstate, R_008C04_SQ_GPR_RESOURCE_MGMT_1, tmp, 0xFFFFFFFF, NULL, 0);
r600_context_pipe_state_set(&rctx->ctx, &rstate);
}
@@ -2008,6 +2009,7 @@ void r600_init_config(struct r600_pipe_context *rctx)
tmp |= S_008C04_NUM_PS_GPRS(num_ps_gprs);
tmp |= S_008C04_NUM_VS_GPRS(num_vs_gprs);
tmp |= S_008C04_NUM_CLAUSE_TEMP_GPRS(num_temp_gprs);
+ rctx->r6xx_num_clause_temp_gprs = num_temp_gprs;
r600_pipe_state_add_reg(rstate, R_008C04_SQ_GPR_RESOURCE_MGMT_1, tmp, 0xFFFFFFFF, NULL, 0);
/* SQ_GPR_RESOURCE_MGMT_2 */