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authorMarek Olšák <[email protected]>2016-05-31 23:07:15 +0200
committerMarek Olšák <[email protected]>2016-06-04 15:42:33 +0200
commit7746903d3a68c97e86b88d5aa16995015b4db4ba (patch)
treef43435bffd9001a1cf5483063d52332431e4edbc /src
parentee0c96c11eb3bee5010e5a22ff18d51cd948c075 (diff)
r600g: write WAIT_UNTIL in the correct place
This has been wrong all along. Fixing this will allow removing useless cache flushes. Cc: 11.1 11.2 12.0 <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Tested-by: Grazvydas Ignotas <[email protected]> Tested-by: Dieter Nützel <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/r600/r600_hw_context.c19
1 files changed, 11 insertions, 8 deletions
diff --git a/src/gallium/drivers/r600/r600_hw_context.c b/src/gallium/drivers/r600/r600_hw_context.c
index 430ffb34550..6df1360a034 100644
--- a/src/gallium/drivers/r600/r600_hw_context.c
+++ b/src/gallium/drivers/r600/r600_hw_context.c
@@ -110,11 +110,22 @@ void r600_flush_emit(struct r600_context *rctx)
}
}
+ /* Wait packets must be executed first, because SURFACE_SYNC doesn't
+ * wait for shaders if it's not flushing CB or DB.
+ */
if (rctx->b.flags & R600_CONTEXT_PS_PARTIAL_FLUSH) {
radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_PS_PARTIAL_FLUSH) | EVENT_INDEX(4));
}
+ if (wait_until) {
+ /* Use of WAIT_UNTIL is deprecated on Cayman+ */
+ if (rctx->b.family < CHIP_CAYMAN) {
+ /* wait for things to settle */
+ radeon_set_config_reg(cs, R_008040_WAIT_UNTIL, wait_until);
+ }
+ }
+
if (rctx->b.chip_class >= R700 &&
(rctx->b.flags & R600_CONTEXT_FLUSH_AND_INV_CB_META)) {
radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
@@ -228,14 +239,6 @@ void r600_flush_emit(struct r600_context *rctx)
EVENT_INDEX(0));
}
- if (wait_until) {
- /* Use of WAIT_UNTIL is deprecated on Cayman+ */
- if (rctx->b.family < CHIP_CAYMAN) {
- /* wait for things to settle */
- radeon_set_config_reg(cs, R_008040_WAIT_UNTIL, wait_until);
- }
- }
-
/* everything is properly flushed */
rctx->b.flags = 0;
}