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authorPaul Berry <[email protected]>2011-08-24 20:03:35 -0700
committerPaul Berry <[email protected]>2011-09-06 11:05:11 -0700
commit62b0c8561e2d259e4dc1f27346bf2f36c3b098c8 (patch)
treea082d1eabf98676434cdcb427e605b88bd3394af /src
parenteae5b5c44e58ad2937600991a5569518d3023f68 (diff)
i965: clip: Move hpos_offest and ndc_offset into local functions.
The offsets within the VUE of HPOS and NDC are needed only in a few auxiliary clipping functions. This patch moves computation of those offsets into the functions that need them, and does the computation using the VUE map. Reviewed-by: Eric Anholt <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i965/brw_clip.c2
-rw-r--r--src/mesa/drivers/dri/i965/brw_clip.h1
-rw-r--r--src/mesa/drivers/dri/i965/brw_clip_line.c6
-rw-r--r--src/mesa/drivers/dri/i965/brw_clip_tri.c17
-rw-r--r--src/mesa/drivers/dri/i965/brw_clip_unfilled.c12
-rw-r--r--src/mesa/drivers/dri/i965/brw_clip_util.c8
6 files changed, 29 insertions, 17 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_clip.c b/src/mesa/drivers/dri/i965/brw_clip.c
index f9f3fd4f1e3..f5ae966f8e3 100644
--- a/src/mesa/drivers/dri/i965/brw_clip.c
+++ b/src/mesa/drivers/dri/i965/brw_clip.c
@@ -77,8 +77,6 @@ static void compile_clip_prog( struct brw_context *brw,
/* Need to locate the two positions present in vertex + header.
* These are currently hardcoded:
*/
- c.ndc_offset = ATTR_SIZE;
-
if (intel->gen == 5)
header_regs = 3;
else
diff --git a/src/mesa/drivers/dri/i965/brw_clip.h b/src/mesa/drivers/dri/i965/brw_clip.h
index 4e4166c9131..abd35d235fe 100644
--- a/src/mesa/drivers/dri/i965/brw_clip.h
+++ b/src/mesa/drivers/dri/i965/brw_clip.h
@@ -115,7 +115,6 @@ struct brw_clip_compile {
GLboolean need_direction;
- GLuint ndc_offset;
/** Mapping from VERT_RESULT_* to offset within the VUE. */
GLuint offset[VERT_RESULT_MAX];
/** Mapping from attribute index to VERT_RESULT_* */
diff --git a/src/mesa/drivers/dri/i965/brw_clip_line.c b/src/mesa/drivers/dri/i965/brw_clip_line.c
index d771853f421..9e019c804d6 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_line.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_line.c
@@ -134,6 +134,8 @@ static void clip_and_emit_line( struct brw_clip_compile *c )
struct brw_indirect plane_ptr = brw_indirect(4, 0);
struct brw_instruction *plane_loop;
struct brw_reg v1_null_ud = retype(vec1(brw_null_reg()), BRW_REGISTER_TYPE_UD);
+ GLuint hpos_offset = brw_vert_result_to_offset(&c->vue_map,
+ VERT_RESULT_HPOS);
brw_MOV(p, get_addr_reg(vtx0), brw_address(c->reg.vertex[0]));
brw_MOV(p, get_addr_reg(vtx1), brw_address(c->reg.vertex[1]));
@@ -174,12 +176,12 @@ static void clip_and_emit_line( struct brw_clip_compile *c )
/* dp = DP4(vtx->position, plane)
*/
- brw_DP4(p, vec4(c->reg.dp0), deref_4f(vtx0, c->offset[VERT_RESULT_HPOS]), c->reg.plane_equation);
+ brw_DP4(p, vec4(c->reg.dp0), deref_4f(vtx0, hpos_offset), c->reg.plane_equation);
/* if (IS_NEGATIVE(dp1))
*/
brw_set_conditionalmod(p, BRW_CONDITIONAL_L);
- brw_DP4(p, vec4(c->reg.dp1), deref_4f(vtx1, c->offset[VERT_RESULT_HPOS]), c->reg.plane_equation);
+ brw_DP4(p, vec4(c->reg.dp1), deref_4f(vtx1, hpos_offset), c->reg.plane_equation);
brw_IF(p, BRW_EXECUTE_1);
{
/*
diff --git a/src/mesa/drivers/dri/i965/brw_clip_tri.c b/src/mesa/drivers/dri/i965/brw_clip_tri.c
index 0dca05d0361..0f938fe0b6f 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_tri.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_tri.c
@@ -231,6 +231,8 @@ void brw_clip_tri( struct brw_clip_compile *c )
struct brw_indirect freelist_ptr = brw_indirect(6, 0);
struct brw_instruction *plane_loop;
struct brw_instruction *vertex_loop;
+ GLuint hpos_offset = brw_vert_result_to_offset(&c->vue_map,
+ VERT_RESULT_HPOS);
brw_MOV(p, get_addr_reg(vtxPrev), brw_address(c->reg.vertex[2]) );
brw_MOV(p, get_addr_reg(plane_ptr), brw_clip_plane0_address(c));
@@ -269,13 +271,13 @@ void brw_clip_tri( struct brw_clip_compile *c )
/* IS_NEGATIVE(prev) */
brw_set_conditionalmod(p, BRW_CONDITIONAL_L);
- brw_DP4(p, vec4(c->reg.dpPrev), deref_4f(vtxPrev, c->offset[VERT_RESULT_HPOS]), c->reg.plane_equation);
+ brw_DP4(p, vec4(c->reg.dpPrev), deref_4f(vtxPrev, hpos_offset), c->reg.plane_equation);
brw_IF(p, BRW_EXECUTE_1);
{
/* IS_POSITIVE(next)
*/
brw_set_conditionalmod(p, BRW_CONDITIONAL_GE);
- brw_DP4(p, vec4(c->reg.dp), deref_4f(vtx, c->offset[VERT_RESULT_HPOS]), c->reg.plane_equation);
+ brw_DP4(p, vec4(c->reg.dp), deref_4f(vtx, hpos_offset), c->reg.plane_equation);
brw_IF(p, BRW_EXECUTE_1);
{
@@ -317,7 +319,7 @@ void brw_clip_tri( struct brw_clip_compile *c )
/* IS_NEGATIVE(next)
*/
brw_set_conditionalmod(p, BRW_CONDITIONAL_L);
- brw_DP4(p, vec4(c->reg.dp), deref_4f(vtx, c->offset[VERT_RESULT_HPOS]), c->reg.plane_equation);
+ brw_DP4(p, vec4(c->reg.dp), deref_4f(vtx, hpos_offset), c->reg.plane_equation);
brw_IF(p, BRW_EXECUTE_1);
{
/* Going out of bounds. Avoid division by zero as we
@@ -477,12 +479,15 @@ static void brw_clip_test( struct brw_clip_compile *c )
struct brw_compile *p = &c->func;
struct brw_reg tmp0 = c->reg.loopcount; /* handy temporary */
+ GLuint hpos_offset = brw_vert_result_to_offset(&c->vue_map,
+ VERT_RESULT_HPOS);
+
brw_MOV(p, get_addr_reg(vt0), brw_address(c->reg.vertex[0]));
brw_MOV(p, get_addr_reg(vt1), brw_address(c->reg.vertex[1]));
brw_MOV(p, get_addr_reg(vt2), brw_address(c->reg.vertex[2]));
- brw_MOV(p, v0, deref_4f(vt0, c->offset[VERT_RESULT_HPOS]));
- brw_MOV(p, v1, deref_4f(vt1, c->offset[VERT_RESULT_HPOS]));
- brw_MOV(p, v2, deref_4f(vt2, c->offset[VERT_RESULT_HPOS]));
+ brw_MOV(p, v0, deref_4f(vt0, hpos_offset));
+ brw_MOV(p, v1, deref_4f(vt1, hpos_offset));
+ brw_MOV(p, v2, deref_4f(vt2, hpos_offset));
brw_AND(p, c->reg.planemask, c->reg.planemask, brw_imm_ud(~0x3f));
/* test nearz, xmin, ymin plane */
diff --git a/src/mesa/drivers/dri/i965/brw_clip_unfilled.c b/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
index 97f321966ac..da587960cdf 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
@@ -52,9 +52,11 @@ static void compute_tri_direction( struct brw_clip_compile *c )
struct brw_compile *p = &c->func;
struct brw_reg e = c->reg.tmp0;
struct brw_reg f = c->reg.tmp1;
- struct brw_reg v0 = byte_offset(c->reg.vertex[0], c->offset[VERT_RESULT_HPOS]);
- struct brw_reg v1 = byte_offset(c->reg.vertex[1], c->offset[VERT_RESULT_HPOS]);
- struct brw_reg v2 = byte_offset(c->reg.vertex[2], c->offset[VERT_RESULT_HPOS]);
+ GLuint hpos_offset = brw_vert_result_to_offset(&c->vue_map,
+ VERT_RESULT_HPOS);
+ struct brw_reg v0 = byte_offset(c->reg.vertex[0], hpos_offset);
+ struct brw_reg v1 = byte_offset(c->reg.vertex[1], hpos_offset);
+ struct brw_reg v2 = byte_offset(c->reg.vertex[2], hpos_offset);
struct brw_reg v0n = get_tmp(c);
@@ -236,7 +238,9 @@ static void apply_one_offset( struct brw_clip_compile *c,
struct brw_indirect vert )
{
struct brw_compile *p = &c->func;
- struct brw_reg z = deref_1f(vert, c->ndc_offset +
+ GLuint ndc_offset = brw_vert_result_to_offset(&c->vue_map,
+ BRW_VERT_RESULT_NDC);
+ struct brw_reg z = deref_1f(vert, ndc_offset +
2 * type_sz(BRW_REGISTER_TYPE_F));
brw_ADD(p, z, z, vec1(c->reg.offset));
diff --git a/src/mesa/drivers/dri/i965/brw_clip_util.c b/src/mesa/drivers/dri/i965/brw_clip_util.c
index 7e2998366be..8cbb2ff886a 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_util.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_util.c
@@ -109,13 +109,17 @@ static void brw_clip_project_vertex( struct brw_clip_compile *c,
{
struct brw_compile *p = &c->func;
struct brw_reg tmp = get_tmp(c);
+ GLuint hpos_offset = brw_vert_result_to_offset(&c->vue_map,
+ VERT_RESULT_HPOS);
+ GLuint ndc_offset = brw_vert_result_to_offset(&c->vue_map,
+ BRW_VERT_RESULT_NDC);
/* Fixup position. Extract from the original vertex and re-project
* to screen space:
*/
- brw_MOV(p, tmp, deref_4f(vert_addr, c->offset[VERT_RESULT_HPOS]));
+ brw_MOV(p, tmp, deref_4f(vert_addr, hpos_offset));
brw_clip_project_position(c, tmp);
- brw_MOV(p, deref_4f(vert_addr, c->ndc_offset), tmp);
+ brw_MOV(p, deref_4f(vert_addr, ndc_offset), tmp);
release_tmp(c, tmp);
}