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authorBen Skeggs <[email protected]>2016-02-15 15:37:29 +1000
committerBen Skeggs <[email protected]>2016-02-16 15:56:56 +1000
commit59d93ad1bebd686a40d3f539c2f169fd414555ba (patch)
treeff36f4c87f6a4e205be37889ee5413c67fae307d /src
parent1a45b7afb6f39a59db9d879f18678929bc63ec34 (diff)
nv50: switch nv50_state.c to updated g80_texture.xml.h
Verified (binary diff) to produce identical code. Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/nouveau/nv50/nv50_state.c53
1 files changed, 29 insertions, 24 deletions
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_state.c b/src/gallium/drivers/nouveau/nv50/nv50_state.c
index 438f41385f0..c8eea994f59 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_state.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_state.c
@@ -34,7 +34,7 @@
#include "nv50/nv50_query_hw.h"
#include "nv50/nv50_3d.xml.h"
-#include "nv50/nv50_texture.xml.h"
+#include "nv50/g80_texture.xml.h"
#include "nouveau_gldefs.h"
@@ -438,24 +438,29 @@ nv50_zsa_state_delete(struct pipe_context *pipe, void *hwcso)
/* ====================== SAMPLERS AND TEXTURES ================================
*/
-#define NV50_TSC_WRAP_CASE(n) \
- case PIPE_TEX_WRAP_##n: return NV50_TSC_WRAP_##n
-
static inline unsigned
nv50_tsc_wrap_mode(unsigned wrap)
{
switch (wrap) {
- NV50_TSC_WRAP_CASE(REPEAT);
- NV50_TSC_WRAP_CASE(MIRROR_REPEAT);
- NV50_TSC_WRAP_CASE(CLAMP_TO_EDGE);
- NV50_TSC_WRAP_CASE(CLAMP_TO_BORDER);
- NV50_TSC_WRAP_CASE(CLAMP);
- NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_EDGE);
- NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_BORDER);
- NV50_TSC_WRAP_CASE(MIRROR_CLAMP);
+ case PIPE_TEX_WRAP_REPEAT:
+ return G80_TSC_WRAP_WRAP;
+ case PIPE_TEX_WRAP_MIRROR_REPEAT:
+ return G80_TSC_WRAP_MIRROR;
+ case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
+ return G80_TSC_WRAP_CLAMP_TO_EDGE;
+ case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
+ return G80_TSC_WRAP_BORDER;
+ case PIPE_TEX_WRAP_CLAMP:
+ return G80_TSC_WRAP_CLAMP_OGL;
+ case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
+ return G80_TSC_WRAP_MIRROR_ONCE_CLAMP_TO_EDGE;
+ case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
+ return G80_TSC_WRAP_MIRROR_ONCE_BORDER;
+ case PIPE_TEX_WRAP_MIRROR_CLAMP:
+ return G80_TSC_WRAP_MIRROR_ONCE_CLAMP_OGL;
default:
NOUVEAU_ERR("unknown wrap mode: %d\n", wrap);
- return NV50_TSC_WRAP_REPEAT;
+ return G80_TSC_WRAP_WRAP;
}
}
@@ -475,42 +480,42 @@ nv50_sampler_state_create(struct pipe_context *pipe,
switch (cso->mag_img_filter) {
case PIPE_TEX_FILTER_LINEAR:
- so->tsc[1] = NV50_TSC_1_MAGF_LINEAR;
+ so->tsc[1] = G80_TSC_1_MAG_FILTER_LINEAR;
break;
case PIPE_TEX_FILTER_NEAREST:
default:
- so->tsc[1] = NV50_TSC_1_MAGF_NEAREST;
+ so->tsc[1] = G80_TSC_1_MAG_FILTER_NEAREST;
break;
}
switch (cso->min_img_filter) {
case PIPE_TEX_FILTER_LINEAR:
- so->tsc[1] |= NV50_TSC_1_MINF_LINEAR;
+ so->tsc[1] |= G80_TSC_1_MIN_FILTER_LINEAR;
break;
case PIPE_TEX_FILTER_NEAREST:
default:
- so->tsc[1] |= NV50_TSC_1_MINF_NEAREST;
+ so->tsc[1] |= G80_TSC_1_MIN_FILTER_NEAREST;
break;
}
switch (cso->min_mip_filter) {
case PIPE_TEX_MIPFILTER_LINEAR:
- so->tsc[1] |= NV50_TSC_1_MIPF_LINEAR;
+ so->tsc[1] |= G80_TSC_1_MIP_FILTER_LINEAR;
break;
case PIPE_TEX_MIPFILTER_NEAREST:
- so->tsc[1] |= NV50_TSC_1_MIPF_NEAREST;
+ so->tsc[1] |= G80_TSC_1_MIP_FILTER_NEAREST;
break;
case PIPE_TEX_MIPFILTER_NONE:
default:
- so->tsc[1] |= NV50_TSC_1_MIPF_NONE;
+ so->tsc[1] |= G80_TSC_1_MIP_FILTER_NONE;
break;
}
if (nouveau_screen(pipe->screen)->class_3d >= NVE4_3D_CLASS) {
if (cso->seamless_cube_map)
- so->tsc[1] |= NVE4_TSC_1_CUBE_SEAMLESS;
+ so->tsc[1] |= GK104_TSC_1_CUBEMAP_INTERFACE_FILTERING;
if (!cso->normalized_coords)
- so->tsc[1] |= NVE4_TSC_1_FORCE_NONNORMALIZED_COORDS;
+ so->tsc[1] |= GK104_TSC_1_FLOAT_COORD_NORMALIZATION_FORCE_UNNORMALIZED_COORDS;
}
if (cso->max_anisotropy >= 16)
@@ -522,10 +527,10 @@ nv50_sampler_state_create(struct pipe_context *pipe,
so->tsc[0] |= (cso->max_anisotropy >> 1) << 20;
if (cso->max_anisotropy >= 4)
- so->tsc[1] |= NV50_TSC_1_UNKN_ANISO_35;
+ so->tsc[1] |= 6 << G80_TSC_1_TRILIN_OPT__SHIFT;
else
if (cso->max_anisotropy >= 2)
- so->tsc[1] |= NV50_TSC_1_UNKN_ANISO_15;
+ so->tsc[1] |= 4 << G80_TSC_1_TRILIN_OPT__SHIFT;
}
if (cso->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) {